�
�� � 8 P ( y lge,lg1313-ref lge,lg1313 & / 7LG Electronics, DTV SoC LG1313 Reference Board cpus cpu@0 =cpu arm,cortex-a53 I M ^ cpu@1 =cpu arm,cortex-a53 I fpsci M ^ cpu@2 =cpu arm,cortex-a53 I fpsci M ^ cpu@3 =cpu arm,cortex-a53 I fpsci M ^ l2-cache0 cache ^ psci arm,psci-0.2 arm,psci msmc t� �� �� interrupt-controller@c0001000 � arm,gic-400 � 0 I � � � @ � ` ^ pmu arm,cortex-a53-pmu 0 � � � � � � timer arm,armv8-timer 0 �
clk_bus � fixed-clock � �=� �BUSCLK ^ soc simple-bus & ethernet@c3700000 cdns,gem I �p � %
hclk pclk rmii & amba � simple-bus & timer@fd100000 arm,sp804 arm,primecell I � �
timer0clk timer1clk apb_pclk watchdog@fd200000 arm,sp805 arm,primecell I � �
wdog_clk apb_pclk serial@fe000000 arm,pl011 arm,primecell I � �
apb_pclk 2okay serial@fe100000 arm,pl011 arm,primecell I � �
apb_pclk 2disabled serial@fe200000 arm,pl011 arm,primecell I � �
apb_pclk 2disabled spi@fe800000 arm,pl022 arm,primecell I �� �
apb_pclk spi@fe900000 arm,pl022 arm,primecell I �� �
apb_pclk dma@c1128000 arm,pl330 arm,primecell I �� �
apb_pclk gpio@fd400000 9 arm,pl061 arm,primecell E I �@
apb_pclk 2disabled gpio@fd410000 9 arm,pl061 arm,primecell E I �A
apb_pclk 2disabled gpio@fd420000 9 arm,pl061 arm,primecell E I �B
apb_pclk 2disabled gpio@fd430000 9 arm,pl061 arm,primecell E I �C
apb_pclk gpio@fd440000 9 arm,pl061 arm,primecell E I �D
apb_pclk 2disabled gpio@fd450000 9 arm,pl061 arm,primecell E I �E
apb_pclk 2disabled gpio@fd460000 9 arm,pl061 arm,primecell E I �F
apb_pclk 2disabled gpio@fd470000 9 arm,pl061 arm,primecell E I �G
apb_pclk 2disabled gpio@fd480000 9 arm,pl061 arm,primecell E I �H
apb_pclk 2disabled gpio@fd490000 9 arm,pl061 arm,primecell E I �I
apb_pclk 2disabled gpio@fd4a0000 9 arm,pl061 arm,primecell E I �J
apb_pclk 2disabled gpio@fd4b0000 9 arm,pl061 arm,primecell E I �K
apb_pclk gpio@fd4c0000 9 arm,pl061 arm,primecell E I �L
apb_pclk 2disabled gpio@fd4d0000 9 arm,pl061 arm,primecell E I �M
apb_pclk 2disabled gpio@fd4e0000 9 arm,pl061 arm,primecell E I �N
apb_pclk 2disabled gpio@fd4f0000 9 arm,pl061 arm,primecell E I �O
apb_pclk 2disabled gpio@fd500000 9 arm,pl061 arm,primecell E I �P
apb_pclk 2disabled gpio@fd510000 9 arm,pl061 arm,primecell E I �Q
apb_pclk aliases U/amba/serial@fe000000 ]/amba/serial@fe100000 e/amba/serial@fe200000 memory =memory I chosen mserial0:115200n8 #address-cells #size-cells compatible interrupt-parent model device_type reg next-level-cache phandle enable-method cpu_suspend cpu_off cpu_on #interrupt-cells interrupt-controller interrupts interrupt-affinity #clock-cells clock-frequency clock-output-names ranges clocks clock-names phy-mode mac-address status #gpio-cells gpio-controller serial0 serial1 serial2 stdout-path