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�� W� 8 RD ( A R Marvell Armada CN9130-CRB-B > !marvell,cn9130 marvell,armada-ap807-quad marvell,armada-ap807 aliases + ,/ap807/config-space@f0000000/serial@512000 + 4/ap807/config-space@f0000000/serial@512100 @ </ap807/config-space@f0000000/system-controller@6f4000/gpio@1040 ( B/ap807/config-space@f0000000/spi@510600 = G/cp0/config-space@f2000000/system-controller@440000/gpio@100 = M/cp0/config-space@f2000000/system-controller@440000/gpio@140 & S/cp0/config-space@f2000000/spi@700600 & X/cp0/config-space@f2000000/spi@700680 & ]/cp0/config-space@f2000000/i2c@701000 + b/cp0/config-space@f2000000/ethernet@0/eth0 + l/cp0/config-space@f2000000/ethernet@0/eth1 + v/cp0/config-space@f2000000/ethernet@0/eth2 psci
!arm,psci-0.2 �smc reserved-memory � psci-area@4000000 � � ap807 !simple-bus � � config-space@f0000000 !simple-bus � � iommu@5000000 # !marvell,ap806-smmu-500 arm,mmu-500 � � � � l � �disabled � 1 interrupt-controller@210000 !arm,gic-400 � � � � � ! " $ & � v2m@280000 !arm,gic-v2m-frame � ( � , � v2m@290000 !arm,gic-v2m-frame � ) � , v2m@2a0000 !arm,gic-v2m-frame � * � , v2m@2b0000 !arm,gic-v2m-frame � + , timer !arm,armv8-timer 0 �
pmu !arm,cortex-a72-pmu � � odmi@300000 !marvell,odmi-controller � = � 0 @ 0@ @ 0� @ 0� @ Q � � � � gicp@3f0040 !marvell,ap806-gicp � ? @ b @ @ @ � interrupt-controller@3f0100 !marvell,armada-8k-pic � ? � � � � interrupt-controller@3f0200 !marvell,ap806-sei � ? @ � � � � xor@400000 % !marvell,armada-7k-xor marvell,xor-v2 � @ A u � � xor@420000 % !marvell,armada-7k-xor marvell,xor-v2 � B C u � � xor@440000 % !marvell,armada-7k-xor marvell,xor-v2 � D E u � � xor@460000 % !marvell,armada-7k-xor marvell,xor-v2 � F G u � � spi@510600 !marvell,armada-380-spi � Q P � � �disabled i2c@511000 !marvell,mv78230-i2c � Q � � �disabled serial@512000 !snps,dw-apb-uart � Q � � � � �okay serial@512100 !snps,dw-apb-uart � Q! � � � � �disabled watchdog@610000 !arm,sbsa-gwdt � a ` � sdhci@6e0000 6 !marvell,armada-ap807-sdhci marvell,armada-ap806-sdhci � n � �core � � � �okay �default � � � system-controller@6f4000 !syscon simple-mfd � o@ pinctrl !marvell,ap806-pinctrl � uart0-pins �mpp11 mpp19 uart0 gpio@1040 !marvell,armada-8k-gpio @ $ 4 @ L � _ � clock !marvell,ap807-clock j � system-controller@6f8000 !syscon simple-mfd � o� thermal-sensor@80 !marvell,armada-ap806-thermal � � � � w � clock-cpu !marvell,ap807-cpu-clock � j � thermal-zones ap-thermal-ic � � � trips ap-crit � �� � � �critical cooling-maps ap-thermal-cpu0 � � � � � trips cpu0-hot � L � � �passive � cpu0-emerg � s � � �passive � cooling-maps map0-hot � �
map0-ermerg � �
ap-thermal-cpu1 � � � � � trips cpu1-hot � L � � �passive �
cpu1-emerg � s � � �passive � cooling-maps map1-hot �
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map1-emerg � �
ap-thermal-cpu2 � � � � � trips cpu2-hot � L � � �passive � cpu2-emerg � s � � �passive � cooling-maps map2-hot � � map2-emerg � � ap-thermal-cpu3 � � � � � trips cpu3-hot � L � � �passive � cpu3-emerg � s � � �passive � cooling-maps map3-bhot � � map3-emerg � � cp0-thermal-ic � � � trips crit � �� � � �critical cooling-maps cpus cpu@0 �cpu !arm,cortex-a72 � �psci � � ' @ 9 F � S @ e r �
cpu@1 �cpu !arm,cortex-a72 � �psci � � ' @ 9 F � S @ e r � cpu@100 �cpu !arm,cortex-a72 � �psci � � ' @ 9 F � S @ e r � cpu@101 �cpu !arm,cortex-a72 � �psci � � ' @ 9 F � S @ e r � l2-cache0 !cache ) @ ; � l2-cache1 !cache ) @ ; � cp0 !simple-bus � � config-space@f2000000 !simple-bus � � ethernet@0 !marvell,armada-7k-pp22 � � � " < � * �pp_clk gop_clk mg_clk mg_core_clk axi_clk � �okay � eth0 P � ' + / 3 7 ; ? C G � 2 �hif0 hif1 hif2 hif3 hif4 hif5 hif6 hif7 hif8 link � � �okay
�10gbase-r �in-band-status � eth1 P � ( , 0 4 8 < @ D H � 2 �hif0 hif1 hif2 hif3 hif4 hif5 hif6 hif7 hif8 link � � �okay � �rgmii-id eth2 P � ) - 1 5 9 = A E I 2 �hif0 hif1 hif2 hif3 hif4 hif5 hif6 hif7 hif8 link � � �disabled � � phy@120000 !marvell,comphy-cp110 � ` � $ � �mg_clk mg_core_clk axi_clk phy@0 � � � 0 phy@1 � � � $ phy@2 � � � ' phy@3 � � � & phy@4 � � � phy@5 � � � mdio@12a200 !marvell,orion-mdio � � 0 � �okay ethernet-phy@0 � � mdio@12a600 !marvell,xmdio � � $ � �okay ethernet-phy@0 !ethernet-phy-ieee802.3-c45 � � interrupt-controller@1e0000 !marvell,cp110-icu � @ interrupt-controller@10 !marvell,cp110-icu-nsr � � � u � interrupt-controller@50 !marvell,cp110-icu-sei � P � � u � " rtc@284000 !marvell,armada-8k-rtc � (@ (@� $ �rtc rtc-soc � M system-controller@440000 !syscon simple-mfd � D � clock !marvell,cp110-clock j � gpio@100 !marvell,armada-8k-gpio $ 4 @ ! L � _ � � V U T S � �core axi � �okay gpio@140 !marvell,armada-8k-gpio @ $ 4 @ ! L � _ � � R Q P O � �core axi � �okay � - pinctrl ! !marvell,cp115-standalone-pinctrl � ! cp0-i2c-pins-0 �mpp37 mpp38 i2c0 � ) cp0-i2c-pins-1 �mpp35 mpp36 i2c1 � * cp0-sdhci-cd-pins-crb �mpp55 gpio � , cp0-sdhi-pins-0 $ �mpp56 mpp57 mpp58 mpp59 mpp60 mpp61 sdio � + cp0-spi-pins-1 �mpp13 mpp14 mpp15 mpp16 spi1 � ( system-controller@400000 !syscon simple-mfd � @ thermal-sensor@70 !marvell,armada-cp110-thermal � p � " t w � utmi@580000 !marvell,cp110-utmi-phy � X � �disabled usb-phy@0 � � usb-phy@1 � � usb@500000 $ !marvell,armada-8k-xhci generic-xhci � P @ � � j �core reg � �okay # usb � $ usb@510000 $ !marvell,armada-8k-xhci generic-xhci � Q @ � � i �core reg � �okay % usb � & sata@540000 $ !marvell,armada-8k-ahci generic-ahci � T � � k � �okay sata-port@0 � �okay � ' sata-port@1 � xor@6a0000 % !marvell,armada-7k-xor marvell,xor-v2 � j k � u �core reg � xor@6c0000 % !marvell,armada-7k-xor marvell,xor-v2 � l m � u �core reg � spi@700600 !marvell,armada-380-spi � p P �core axi � �disabled spi@700680 !marvell,armada-380-spi � p� P �core axi � �okay �default ( spi-flash@0 !jedec,spi-nor � bZ partitions !fixed-partitions partition@0 2U-Boot � partition@400000 2Filesystem � � i2c@701000 !marvell,mv78230-i2c � p � x �core reg � �okay �default ) 8 �� mcp23x17@20 !microchip,mcp23017 $ 4 � �okay � 2 i2c@701100 !marvell,mv78230-i2c � p � y �core reg � �okay �default * 8 �� serial@702000 !snps,dw-apb-uart � p � � z � �baudclk apb_pclk � �disabled serial@702100 !snps,dw-apb-uart � p! � � { � �baudclk apb_pclk � �disabled serial@702200 !snps,dw-apb-uart � p" � � | � �baudclk apb_pclk � �disabled serial@702300 !snps,dw-apb-uart � p# � � } � �baudclk apb_pclk � �disabled nand@720000 D !marvell,armada-8k-nand-controller marvell,armada370-nand-controller � r T � s �core reg � � �disabled trng@760000 3 !marvell,armada-8k-rng inside-secure,safexcel-eip76 � v } � _ �core reg � �okay sdhci@780000 !marvell,armada-cp110-sdhci � x � �core axi � � �okay �default + , � H - � . Q / crypto@800000 !inside-secure,safexcel-eip197b � � 0 � X Y Z [ \ W �ring0 ring1 ring2 ring3 eip mem �core reg � � pcie@f2600000 # !marvell,armada8k-pcie snps,dw-pcie � �` �� �ctrl config � �pci � u ] � �� � � � g z � � �core reg �
�okay � � 0 0 � 1 � 1 � 1 � � pcie@f2620000 # !marvell,armada8k-pcie snps,dw-pcie � �b �� �ctrl config � �pci � u ] � �� � � � g z � � �core reg � �disabled pcie@f2640000 # !marvell,armada8k-pcie snps,dw-pcie � �d �� �ctrl config � �pci � u ] � �� � � � g z � � �core reg � �disabled chosen �serial0:115200n8 memory@0 �memory � � ap0_mmc_vccq@0 !regulator-gpio
�ap0_mmc_vccq � w@ � 2Z� 2 w@ 2Z� � cp0_usb3_vbus@1 !regulator-fixed �cp0-xhci1-vbus � LK@ � LK@
2 � 3 cp0_usb3_phy0 !usb-nop-xceiv � # cp0_usb3_phy1 !usb-nop-xceiv " 3 � % cp0_sd_vccq@0 !regulator-gpio �cp0_sd_vccq � w@ � 2Z� - w@ 2Z� � . cp0_sd_vcc@0 !regulator-fixed �cp0_sd_vcc � 2Z� � 2Z� -
- � / #address-cells #size-cells model compatible serial0 serial1 gpio0 spi0 gpio1 gpio2 spi1 spi2 i2c0 ethernet0 ethernet1 ethernet2 method ranges reg no-map interrupt-parent dma-coherent #iommu-cells #global-interrupts status phandle #interrupt-cells interrupt-controller msi-controller arm,msi-base-spi arm,msi-num-spis marvell,odmi-frames marvell,spi-base marvell,spi-ranges msi-parent clocks reg-shift reg-io-width clock-names marvell,xenon-phy-slow-mode pinctrl-names bus-width mmc-ddr-1_8v vqmmc-supply marvell,pins marvell,function offset ngpios gpio-controller #gpio-cells gpio-ranges marvell,pwm-offset #pwm-cells #clock-cells #thermal-sensor-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis type trip cooling-device device_type enable-method #cooling-cells i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache marvell,system-controller interrupt-names port-id gop-port-id phy-mode managed phys phy #phy-cells reg-names interrupts-extended usb-phy phy-names pinctrl-0 spi-max-frequency label clock-frequency cd-gpios vmmc-supply bus-range interrupt-map-mask interrupt-map num-lanes num-viewport iommu-map iommu-map-mask stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt states enable-active-high gpio vcc-supply regulator-always-on