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�� (L H &� ( � &< � 0 * toshiba,tmpv7708-rm-mbrc toshiba,tmpv7708 &Toshiba TMPV7708 RM main board cpus cpu-map cluster0 core0 , core1 , core2 , core3 , cluster1 core0 , core1 , core2 , core3 , cpu@0 arm,cortex-a53 0cpu <spin-table J � [ _ cpu@1 arm,cortex-a53 0cpu <spin-table J � [ _ cpu@2 arm,cortex-a53 0cpu <spin-table J � [ _ cpu@3 arm,cortex-a53 0cpu <spin-table J � [ _ cpu@100 arm,cortex-a53 0cpu <spin-table J � [ _ cpu@101 arm,cortex-a53 0cpu <spin-table J � [ _ cpu@102 arm,cortex-a53 0cpu <spin-table J � [ _ cpu@103 arm,cortex-a53 0cpu <spin-table J � [ _ timer arm,armv8-timer g 0 x
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� uart-clk fixed-clock ��р � _ clk125mhz fixed-clock �sY@ �
�clk125mhz _ " clk300mhz fixed-clock �� �
�clk300mhz _ ! wdt-clk fixed-clock ��р � _ # soc simple-bus g � interrupt-controller@24001000 arm,gic-400 � � x � @ [ $ $ $ @ $ ` _ pmux@24190000 toshiba,tmpv7708-pinctrl [ $ _
spi0-pins �spi0 �spi0_grp _ spi1-pins �spi1 �spi1_grp _ spi2-pins �spi2 �spi2_grp _ spi3-pins �spi3 �spi3_grp _ spi4-pins �spi4 �spi4_grp _ spi5-pins �spi5 �spi5_grp _ spi6-pins �spi6 �spi6_grp _ uart0-pins �uart0
�uart0_grp _ uart1-pins �uart1
�uart1_grp _
uart2-pins �uart2
�uart2_grp _ uart3-pins �uart3
�uart3_grp _ i2c0-pins �i2c0 �i2c0_grp � _ i2c1-pins �i2c1 �i2c1_grp � _ i2c2-pins �i2c2 �i2c2_grp � _ i2c3-pins �i2c3 �i2c3_grp � _ i2c4-pins �i2c4 �i2c4_grp � _ i2c5-pins �i2c5 �i2c5_grp � _ i2c6-pins �i2c6 �i2c6_grp � _ i2c7-pins �i2c7 �i2c7_grp � _ i2c8-pins �i2c8 �i2c8_grp � _ pwm_mux �pwm @ �pwm0_gpio16_grp pwm1_gpio17_grp pwm2_gpio18_grp pwm3_gpio19_grp _ $ gpio@28020000 toshiba,gpio-tmpv7708 [ ( �
� � g %okay serial@28200000 arm,pl011 arm,primecell [ ( x � ,default : %okay D Kapb_pclk serial@28201000 arm,pl011 arm,primecell [ ( x � ,default :
%okay D Kapb_pclk serial@28202000 arm,pl011 arm,primecell [ ( x � ,default : %disabled serial@28203000 arm,pl011 arm,primecell [ ( 0 x � ,default : %disabled i2c@28030000 snps,designware-i2c [ ( x � ,default : � � %disabled i2c@28031000 snps,designware-i2c [ ( x � ,default : � � %disabled i2c@28032000 snps,designware-i2c [ ( x � ,default : � � %disabled i2c@28033000 snps,designware-i2c [ (0 x � ,default : � � %disabled i2c@28034000 snps,designware-i2c [ (@ x � ,default : � � %disabled i2c@28035000 snps,designware-i2c [ (P x � ,default : � � %disabled i2c@28036000 snps,designware-i2c [ (` x � ,default : � � %disabled i2c@28037000 snps,designware-i2c [ (p x � ,default : � � %disabled i2c@28038000 snps,designware-i2c [ (� x � ,default : � � %disabled spi@28140000 arm,pl022 arm,primecell [ ( x { ,default : W %disabled spi@28141000 arm,pl022 arm,primecell [ ( x | ,default : W %disabled spi@28142000 arm,pl022 arm,primecell [ ( x } ,default : W %disabled spi@28143000 arm,pl022 arm,primecell [ (0 x ~ ,default : W %disabled spi@28144000 arm,pl022 arm,primecell [ (@ x ,default : W %disabled spi@28145000 arm,pl022 arm,primecell [ (P x � ,default : W %disabled spi@28146000 arm,pl022 arm,primecell [ (` x � ,default : W %disabled ethernet@28000000 ( toshiba,visconti-dwmac snps,dwmac-4.20a [ ( x � ^macirq n y � %okay � �rgmii-id D ! " Kstmmaceth phy_ref_clk mdio0 snps,dwmac-mdio ethernet-phy@1
0ethernet-phy [ _ wdt@28330000 toshiba,visconti-wdt [ (3 %okay D # pwm@241c0000 toshiba,visconti-pwm [ $ ,default : $ � %okay aliases �/soc/serial@28200000 �/soc/serial@28201000 chosen �serial0:115200n8 memory@80000000 0memory [ � 0 compatible #address-cells #size-cells model cpu device_type enable-method cpu-release-addr reg phandle interrupt-parent interrupts clock-frequency #clock-cells clock-output-names ranges interrupt-controller #interrupt-cells function groups bias-pull-up #gpio-cells gpio-ranges gpio-controller status pinctrl-names pinctrl-0 clocks clock-names num-cs interrupt-names snps,txpbl snps,rxpbl snps,tso phy-handle phy-mode #pwm-cells serial0 serial1 stdout-path