�
�� J� 8 F� (
Fp 7 xlnx,zynqmp-zc1232-revA xlnx,zynqmp-zc1232 xlnx,zynqmp &ZynqMP ZC1232 RevA cpus cpu@0 arm,cortex-a53 ,cpu 8psci F Z ^ n
cpu@1 arm,cortex-a53 ,cpu 8psci Z F ^ cpu@2 arm,cortex-a53 ,cpu 8psci Z F ^ cpu@3 arm,cortex-a53 ,cpu 8psci Z F ^ idle-states upsci cpu-sleep-0 arm,idle-state �@ � � , � X � ' � cpu-opp-table operating-points-v2 � � opp00 � G��� � B@ � opp01 � #�E� � B@ � opp02 � ׃� � B@ � opp03 � � � B@ � zynqmp_ipi xlnx,zynqmp-ipi-mailbox & # 1 = mailbox@ff990400 @ Z ��� ��� ��� ��� X Dlocal_request_region local_response_region remote_request_region remote_response_region N 1 � dcc arm,dcc Zokay pmu arm,armv8-pmuv3 0 & � � � � psci
arm,psci-0.2 ?smc firmware zynqmp-firmware xlnx,zynqmp-firmware a ?smc � zynqmp-power xlnx,zynqmp-power & # u |tx rx clock-controller � xlnx,zynqmp-clk n
A �pss_ref_clk video_clk pss_alt_ref_clk aux_ref_clk gt_crx_ref_clk � nvmem_firmware xlnx,zynqmp-nvmem-fw soc_revision@0 Z pcap xlnx,zynqmp-pcap-fpga � zynqmp-aes xlnx,zynqmp-aes reset-controller xlnx,zynqmp-reset � � timer arm,armv8-timer 0 &
fpga-full fpga-region � = axi simple-bus = can@ff060000 xlnx,zynq-can-1.0 Zdisabled
�can_clk pclk Z � & � @ � @ � / n ? can@ff070000 xlnx,zynq-can-1.0 Zdisabled
�can_clk pclk Z � & � @ � @ � 0 n @ cci@fd6e0000 arm,cci-400 Z �n � = �n pmu@9000 arm,cci-400-pmu,r1 Z � P < & { { { { { dma@fd500000 Zdisabled xlnx,zynqmp-dma-1.0 Z �P & | �clk_main clk_apb � � �
� � * n dma@fd510000 Zdisabled xlnx,zynqmp-dma-1.0 Z �Q & } �clk_main clk_apb � � �
� � * n dma@fd520000 Zdisabled xlnx,zynqmp-dma-1.0 Z �R & ~ �clk_main clk_apb � � �
� � * n dma@fd530000 Zdisabled xlnx,zynqmp-dma-1.0 Z �S & �clk_main clk_apb � � �
� � * n dma@fd540000 Zdisabled xlnx,zynqmp-dma-1.0 Z �T & � �clk_main clk_apb � � �
� � * n dma@fd550000 Zdisabled xlnx,zynqmp-dma-1.0 Z �U & � �clk_main clk_apb � � �
� � * n dma@fd560000 Zdisabled xlnx,zynqmp-dma-1.0 Z �V & � �clk_main clk_apb � � �
� � * n dma@fd570000 Zdisabled xlnx,zynqmp-dma-1.0 Z �W & � �clk_main clk_apb � � �
� � * n interrupt-controller@f9010000 arm,gic-400 @ Z � � � � & � dma@ffa80000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & M �clk_main clk_apb � @ �
h � + n D dma@ffa90000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & N �clk_main clk_apb � @ �
i � + n D dma@ffaa0000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & O �clk_main clk_apb � @ �
j � + n D dma@ffab0000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & P �clk_main clk_apb � @ �
k � + n D dma@ffac0000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & Q �clk_main clk_apb � @ �
l � + n D dma@ffad0000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & R �clk_main clk_apb � @ �
m � + n D dma@ffae0000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & S �clk_main clk_apb � @ �
n � + n D dma@ffaf0000 Zdisabled xlnx,zynqmp-dma-1.0 Z �� & T �clk_main clk_apb � @ �
o � + n D memory-controller@fd070000 xlnx,zynqmp-ddrc-2.40a Z � & p nand-controller@ff100000 - xlnx,zynqmp-nand-controller arasan,nfc-v3p10 Zdisabled Z � �controller bus & �
r � , n < ethernet@ff0b0000 cdns,zynqmp-gem cdns,gem Zdisabled & 9 9 Z � �pclk hclk tx_clk rx_clk tsu_clk �
t � ( n h - 1 , ethernet@ff0c0000 cdns,zynqmp-gem cdns,gem Zdisabled & ; ; Z � �pclk hclk tx_clk rx_clk tsu_clk �
u � ( n i . 2 , ethernet@ff0d0000 cdns,zynqmp-gem cdns,gem Zdisabled & = = Z �
�pclk hclk tx_clk rx_clk tsu_clk �
v � ( n j / 3 , ethernet@ff0e0000 cdns,zynqmp-gem cdns,gem Zdisabled & ? ? Z � �pclk hclk tx_clk rx_clk tsu_clk �
w � ( n k 0 4 , gpio@ff0a0000 xlnx,zynqmp-gpio-1.0 Zdisabled - 9 & Z �
� . n i2c@ff020000 cdns,i2c-r1p14 Zdisabled & Z � � % n = i2c@ff030000 cdns,i2c-r1p14 Zdisabled & Z � � & n > pcie@fd0e0000 xlnx,nwl-pcie-2.11 Zdisabled I ,pci < & v u t s r Xmisc dummy intx msi1 msi0 h 0 Z � �H � Dbreg pcireg cfg 8 = � � C s � } ` � � ; n � legacy-interrupt-controller � spi@ff0f0000 xlnx,zynqmp-qspi-1.0 Zdisabled
�ref_clk pclk & � Z � � �
s � - n 5 phy@fd400000 xlnx,zynqmp-psgtr-v1.1 Zdisabled Z �@ �= Dserdes siou � rtc@ffa60000 xlnx,zynqmp-rtc Zdisabled Z �� &
Xalarm sec � � ahci@fd0c0000 ceva,ahci-1v84 Zokay Z � & � � �
�
�
�
� n �@( � �J ���?� @( + BJ W��?� mmc@ff160000 # xlnx,zynqmp-8.9a arasan,sdhci-8.9a Zdisabled & 0 Z � �clk_xin clk_ahb �
p � lclk_out_sd0 clk_in_sd0 � ' n 6 mmc@ff170000 # xlnx,zynqmp-8.9a arasan,sdhci-8.9a Zdisabled & 1 Z � �clk_xin clk_ahb �
q � lclk_out_sd1 clk_in_sd1 � ( n 7 iommu@fd800000 arm,mmu-500 Z �� Zdisabled � � & � � � � � � � � � � � � � � � � � �
spi@ff040000 cdns,spi-r1p6 Zdisabled & Z �
�ref_clk pclk � # n : spi@ff050000 cdns,spi-r1p6 Zdisabled & Z �
�ref_clk pclk � $ n ; timer@ff110000 cdns,ttc Zdisabled $ & $ % & Z � � � n timer@ff120000 cdns,ttc Zdisabled $ & ' ( ) Z � � � n timer@ff130000 cdns,ttc Zdisabled $ & * + , Z � � � n timer@ff140000 cdns,ttc Zdisabled $ & - . / Z � � � n serial@ff000000 ! xlnx,zynqmp-uart cdns,uart-r1p12 Zokay & Z � �uart_clk pclk � ! n 8 serial@ff010000 ! xlnx,zynqmp-uart cdns,uart-r1p12 Zdisabled & Z � �uart_clk pclk � " n 9 usb@fe200000
snps,dwc3 Zdisabled & A Z � �clk_xin clk_ahb � n " usb@fe300000
snps,dwc3 Zdisabled & F Z �0 �clk_xin clk_ahb � n ! " watchdog@fd4d0000 cdns,wdt-r1p2 Zdisabled & q Z �M �
n K watchdog@ff150000 cdns,wdt-r1p2 Zdisabled & 4 Z � �
n p dma-controller@fd4c0000 xlnx,zynqmp-dpdma Zdisabled Z �L & z �axi_clk � ) � n � display@fd4a0000 xlnx,zynqmp-dpsub-1.7 Zdisabled @ Z �J �J� �J� �J� Ddp blend av_buf aud & w * �dp_apb_clk dp_aud_clk dp_vtc_pixel_clk_in � ) � �vid0 vid1 vid2 gfx0 � n pss_ref_clk fixed-clock � ���U � video_clk fixed-clock � ���� � pss_alt_ref_clk fixed-clock � � � gt_crx_ref_clk fixed-clock � �o� �
aux_ref_clk fixed-clock � ���� � aliases �/axi/serial@ff000000 �/dcc chosen �earlycon serial0:115200n8 memory@0 ,memory Z � compatible #address-cells #size-cells model device_type enable-method operating-points-v2 reg cpu-idle-states clocks entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle opp-shared opp-hz opp-microvolt clock-latency-ns interrupt-parent interrupts xlnx,ipi-id ranges reg-names #mbox-cells status #power-domain-cells mboxes mbox-names #clock-cells clock-names #reset-cells fpga-mgr tx-fifo-depth rx-fifo-depth power-domains xlnx,bus-width #stream-id-cells iommus #interrupt-cells interrupt-controller #gpio-cells gpio-controller msi-controller interrupt-names msi-parent bus-range interrupt-map-mask interrupt-map num-cs #phy-cells calibration ceva,p0-cominit-params ceva,p0-comwake-params ceva,p0-burst-params ceva,p0-retry-params ceva,p1-cominit-params ceva,p1-comwake-params ceva,p1-burst-params ceva,p1-retry-params clock-output-names #iommu-cells #global-interrupts timer-width timeout-sec #dma-cells resets dma-names dmas clock-frequency serial0 serial1 bootargs stdout-path