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�� 7� 8 3L ( � 3 3 hisilicon,hi3798cv200-poplar hisilicon,hi3798cv200 + # 7HiSilicon Poplar Development Board psci
arm,psci-0.2 =smc cpus + cpu@0 arm,cortex-a53 Dcpu P Tpsci cpu@1 arm,cortex-a53 Dcpu P Tpsci cpu@2 arm,cortex-a53 Dcpu P Tpsci cpu@3 arm,cortex-a53 Dcpu P Tpsci interrupt-controller@f1001000 arm,gic-400 P � � b s � timer arm,armv8-timer 0 �
soc@f0000000 simple-bus + � � clock-reset-controller@8a22000 , hisilicon,hi3798cv200-crg syscon simple-mfd P� � � � reset-controller ti,syscon-reset � 8 � � � �
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� system-controller@8000000 % hisilicon,hi3798cv200-sysctrl syscon P � � � peripheral-controller@8a20000 1 hisilicon,hi3798cv200-perictrl syscon simple-mfd P� + � � usb2_phy@120 hisilicon,hi3798cv200-usb2-phy P � ( � � + phy@0 P � � � � phy@1 P � � � usb2_phy@124 hisilicon,hi3798cv200-usb2-phy P $ � ) � � + phy@0 P � � �
phy@850 hisilicon,hi3798cv200-combphy P P � � * � � � * ��� phy@858 hisilicon,hi3798cv200-combphy P X � � ! � � � ! ��� �
pinconf@8a21000 pinconf-single P� � 8 V � s
V W " % & ) . 6 @ G H N O P F X �
gpio-range � � emmc-pins-1 H � $ � � � � � � emmc-pins-2 � ( � � � � � � emmc-pins-3 � , � � � 0 0 � emmc-pins-4 � 0 � � � 0 0 � serial@8b00000 arm,pl011 arm,primecell P� � 1 � 1uartclk apb_pclk =okay serial@8b02000 arm,pl011 arm,primecell P� � 3 � 1uartclk apb_pclk =okay DLS-UART0 i2c@8b10000 hisilicon,hix5hd2-i2c P� + � & J � � =okay DLS-I2C0 i2c@8b11000 hisilicon,hix5hd2-i2c P� + � ' J � � =disabled i2c@8b12000 hisilicon,hix5hd2-i2c P� + � ( J � � =okay DLS-I2C1 i2c@8b13000 hisilicon,hix5hd2-i2c P�0 + � ) J � � =disabled i2c@8b14000 hisilicon,hix5hd2-i2c P�@ + � * J � �
=disabled spi@8b1a000 arm,pl022 arm,primecell P�� � - Z a � 1sspclk apb_pclk + =okay DLS-SPI0 mmc@9820000
snps,dw-mshc P � � " � 1biu ciu � � jreset =okay v � mmc@9830000 hisilicon,hi3798cv200-dw-mshc P � � # � 1ciu biu ciu-sample ciu-drive � � jreset =okay �default � � J �� � � � � v gpio@8b20000 arm,pl061 arm,primecell P� � l � s b
� 1apb_pclk =disabled gpio@8b21000 arm,pl061 arm,primecell P� � m � s b P
� 1apb_pclk =okay GPIO-E GPIO-F GPIO-J gpio@8b22000 arm,pl061 arm,primecell P� � n � s b
� 1apb_pclk =okay & GPIO-H GPIO-I GPIO-L GPIO-G GPIO-K gpio@8b23000 arm,pl061 arm,primecell P�0 � o � s b @
V
W � 1apb_pclk =okay GPIO-C GPIO-B gpio@8b24000 arm,pl061 arm,primecell P�@ � p � s b 0
"
% � 1apb_pclk =okay GPIO-D � gpio@8004000 arm,pl061 arm,primecell P @ � q � s b � 1apb_pclk =okay " USER-LED-1 USER-LED-2 GPIO-A � gpio@8b26000 arm,pl061 arm,primecell P�` � r � s b
&
) � 1apb_pclk =okay USER-LED-0 � gpio@8b27000 arm,pl061 arm,primecell P�p � s � s b
. � 1apb_pclk =disabled � gpio@8b28000 arm,pl061 arm,primecell P�� � t � s b
6 � 1apb_pclk =disabled gpio@8b29000 arm,pl061 arm,primecell P�� � u � s b
@
G � 1apb_pclk =disabled gpio@8b2a000 arm,pl061 arm,primecell P�� � v � s b 0
H
N
O � 1apb_pclk =okay USER-LED-3 � gpio@8b2b000 arm,pl061 arm,primecell P�� � w � s b
P
F � 1apb_pclk =disabled gpio@8b2c000 arm,pl061 arm,primecell P�� � x � s b
X � 1apb_pclk =disabled ethernet@9840000 2 hisilicon,hi3798cv200-gmac hisilicon,hisi-gmac-v2 P � �0 � G � 1mac_core mac_ifc � � �
jmac_core mac_ifc phy =disabled ethernet@9841000 2 hisilicon,hi3798cv200-gmac hisilicon,hisi-gmac-v2 P � �0 � H � 1mac_core mac_ifc � � � jmac_core mac_ifc phy =okay + ( 3rgmii < ' ' u0 phy@3 P � ir@8001000 hisilicon,hix5hd2-ir P � / � =okay Zrc-hisi-poplar pcie@9860000 hisilicon,hi3798cv200-pcie P � lcontrol rc-dbi config + Dpci v � � 0 �� � � � � � �msi b � � � � 1aux pipe sys bus $ � � � �
jsoft sys bus �
�phy =okay � � usb@9880000
generic-ohci P � � C � " % & 1bus clk12 clk48 � � jbus � �usb =okay usb@9890000
generic-ehci P � � B � " # $
1bus phy utmi $ � � � �
jbus phy utmi � �usb =okay aliases �/soc@f0000000/serial@8b00000 �/soc@f0000000/serial@8b02000 chosen �serial0:115200n8 memory@0 Dmemory P � leds
gpio-leds user-led0 Dgreen:user1 d
�heartbeat off user-led1 Dgreen:user2 d �mmc0 off user-led2 Dgreen:user3 d �mmc1 off user-led3 Dgreen:user4 d �none # off regulator-pcie regulator-fixed
33V3_PCIE0 B 2Z� Z 2Z� r w � compatible interrupt-parent #address-cells #size-cells model method device_type reg enable-method #interrupt-cells interrupt-controller phandle interrupts ranges #clock-cells #reset-cells ti,reset-bits clocks resets #phy-cells assigned-clocks assigned-clock-rates hisilicon,fixed-mode hisilicon,mode-select-bits pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range #pinctrl-single,gpio-range-cells pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,slew-rate pinctrl-single,drive-strength clock-names status label clock-frequency num-cs cs-gpios reset-names bus-width cap-sd-highspeed pinctrl-names pinctrl-0 fifo-depth cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v non-removable gpio-controller #gpio-cells gpio-ranges gpio-line-names phy-handle phy-mode hisilicon,phy-reset-delays-us linux,rc-map-name reg-names bus-range num-lanes interrupt-names interrupt-map-mask interrupt-map phys phy-names reset-gpios vpcie-supply serial0 serial2 stdout-path linux,default-trigger default-state panic-indicator regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high