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�� � H < ( g � � Foundation-v8A $ arm,foundation-aarch64 arm,vexpress " 1 chosen aliases / =/bus@8000000/iofpga-bus@300000000/serial@90000 / E/bus@8000000/iofpga-bus@300000000/serial@a0000 / M/bus@8000000/iofpga-bus@300000000/serial@b0000 / U/bus@8000000/iofpga-bus@300000000/serial@c0000 cpus " 1 cpu@0 ]cpu
arm,armv8 i m ~spin-table � � �� cpu@1 ]cpu
arm,armv8 i m ~spin-table � � �� cpu@2 ]cpu
arm,armv8 i m ~spin-table � � �� cpu@3 ]cpu
arm,armv8 i m ~spin-table � � �� l2-cache0 cache � memory@80000000 ]memory i � � � � timer arm,armv8-timer 0 �
��� pmu arm,armv8-pmuv3 0 � < = > ? watchdog@2a440000 arm,sbsa-gwdt i *D *E � � clk24mhz fixed-clock � �n6
�v2m:clk24mhz � refclk1mhz fixed-clock � � B@ �v2m:refclk1mhz refclk32khz fixed-clock � � � �v2m:refclk32khz bus@8000000 arm,vexpress,v2m-p1 simple-bus " 1 x � � ? `
! ! " " # # $ $ % % & & ' ' ( ( ) ) * * ethernet@202000000 smsc,lan91c111 i � iofpga-bus@300000000 simple-bus " 1 � sysreg@10000 arm,vexpress-sysreg i serial@90000 arm,pl011 arm,primecell i � % ,uartclk apb_pclk serial@a0000 arm,pl011 arm,primecell i
� % ,uartclk apb_pclk serial@b0000 arm,pl011 arm,primecell i � % ,uartclk apb_pclk serial@c0000 arm,pl011 arm,primecell i � % ,uartclk apb_pclk virtio-block@130000 virtio,mmio i � * interrupt-controller@2f000000 arm,gic-v3 � " 1 � / 8 P i / / , , ,� � � msi-controller@2f020000 arm,gic-v3-its M \ i model compatible interrupt-parent #address-cells #size-cells serial0 serial1 serial2 serial3 device_type reg next-level-cache enable-method cpu-release-addr phandle interrupts clock-frequency timeout-sec #clock-cells clock-output-names ranges #interrupt-cells interrupt-map-mask interrupt-map clocks clock-names interrupt-controller msi-controller #msi-cells