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�� � H ( � � � RTSM_VE_AEMv8A arm,rtsm_ve,aemv8a arm,vexpress " 1 clk24mhz fixed-clock = Jn6
Zv2m:clk24mhz m refclk1mhz fixed-clock = J B@ Zv2m:refclk1mhz m refclk32khz fixed-clock = J � Zv2m:refclk32khz m v2m-3v3 regulator-fixed u3V3 � 2Z� � 2Z� � m mcc arm,vexpress,config-bus � oscclk1 arm,vexpress-osc � �jep��� = Zv2m:oscclk1 m reset arm,vexpress-reset � muxfpga arm,vexpress-muxfpga � shutdown arm,vexpress-shutdown � reboot arm,vexpress-reboot � dvimode arm,vexpress-dvimode � bus@8000000 simple-bus " 1 ? � 2
! ! " " # # $ $ % % & & ' ' ( ( ) ) * * motherboard-bus@8000000 arm,vexpress,v2m-p1 simple-bus " 1 x flash@0 arm,vexpress-flash cfi-flash @ D ethernet@202000000 smsc,lan91c111 @ O iofpga-bus@300000000 simple-bus " 1 sysreg@10000 arm,vexpress-sysreg @ Z j m sysctl@20000 arm,sp810 arm,primecell @ v }refclk timclk apb_pclk = 0 Ztimerclken0 timerclken1 timerclken2 timerclken3 � � m aaci@40000 arm,pl041 arm,primecell @ O v }apb_pclk mmc@50000 arm,pl180 arm,primecell @ O
� � � � � v }mclk apb_pclk kmi@60000 arm,pl050 arm,primecell @ O v }KMIREFCLK apb_pclk kmi@70000 arm,pl050 arm,primecell @ O
v }KMIREFCLK apb_pclk serial@90000 arm,pl011 arm,primecell @ O v }uartclk apb_pclk serial@a0000 arm,pl011 arm,primecell @
O v }uartclk apb_pclk serial@b0000 arm,pl011 arm,primecell @ O v }uartclk apb_pclk serial@c0000 arm,pl011 arm,primecell @ O v }uartclk apb_pclk watchdog@f0000 arm,sp805 arm,primecell @ O v }wdog_clk apb_pclk timer@110000 arm,sp804 arm,primecell @ O v }timclken1 timclken2 apb_pclk timer@120000 arm,sp804 arm,primecell @ O v }timclken1 timclken2 apb_pclk virtio-block@130000 virtio,mmio @ O * rtc@170000 arm,pl031 arm,primecell @ O v }apb_pclk clcd@1f0000 arm,pl111 arm,primecell @ �combined O v }clcdclk apb_pclk � port endpoint �
m chosen aliases G $/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@90000 G ,/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@a0000 G 4/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@b0000 G </bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@c0000 cpus " 1 cpu@0 Dcpu
arm,armv8 @ Pspin-table ^ � �� o cpu@1 Dcpu
arm,armv8 @ Pspin-table ^ � �� o cpu@2 Dcpu
arm,armv8 @ Pspin-table ^ � �� o cpu@3 Dcpu
arm,armv8 @ Pspin-table ^ � �� o l2-cache0 cache m memory@80000000 Dmemory @ � � � � reserved-memory " 1 vram@18000000 shared-dma-pool @ � � m interrupt-controller@2c001000 arm,gic-400 arm,cortex-a15-gic " � @ @ , , , @ , ` O m timer arm,armv8-timer 0 O
J�� pmu arm,armv8-pmuv3 0 O < = > ? panel arm,rtsm-display port endpoint � m
model compatible interrupt-parent #address-cells #size-cells #clock-cells clock-frequency clock-output-names phandle regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on arm,vexpress,config-bridge arm,vexpress-sysreg,func freq-range ranges #interrupt-cells interrupt-map-mask interrupt-map reg bank-width interrupts gpio-controller #gpio-cells clocks clock-names assigned-clocks assigned-clock-parents cd-gpios wp-gpios max-frequency vmmc-supply interrupt-names memory-region remote-endpoint arm,pl11x,tft-r0g0b0-pads serial0 serial1 serial2 serial3 device_type enable-method cpu-release-addr next-level-cache no-map interrupt-controller