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�� '� H $� ( � $� � FVP Base RevC arm,fvp-base-revc arm,vexpress " 1 clk24mhz fixed-clock = Jn6
Zv2m:clk24mhz m refclk1mhz fixed-clock = J B@ Zv2m:refclk1mhz m refclk32khz fixed-clock = J � Zv2m:refclk32khz m v2m-3v3 regulator-fixed u3V3 � 2Z� � 2Z� � m mcc arm,vexpress,config-bus � oscclk1 arm,vexpress-osc � �jep��� = Zv2m:oscclk1 m reset arm,vexpress-reset � muxfpga arm,vexpress-muxfpga � shutdown arm,vexpress-shutdown � reboot arm,vexpress-reboot � dvimode arm,vexpress-dvimode � bus@8000000 simple-bus " 1 ? T 2
! ! " " # # $ $ % % & & ' ' ( ( ) ) * * + + , , motherboard-bus@8000000 arm,vexpress,v2m-p1 simple-bus " 1 x @rs2 flash@0 arm,vexpress-flash cfi-flash S W ethernet@202000000 smsc,lan91c111 S b iofpga-bus@300000000 simple-bus " 1 sysreg@10000 arm,vexpress-sysreg S m } m sysctl@20000 arm,sp810 arm,primecell S � �refclk timclk apb_pclk = 0 Ztimerclken0 timerclken1 timerclken2 timerclken3 � � m aaci@40000 arm,pl041 arm,primecell S b � �apb_pclk mmc@50000 arm,pl180 arm,primecell S b
� � � � � � �mclk apb_pclk kmi@60000 arm,pl050 arm,primecell S b � �KMIREFCLK apb_pclk kmi@70000 arm,pl050 arm,primecell S b
� �KMIREFCLK apb_pclk serial@90000 arm,pl011 arm,primecell S b � �uartclk apb_pclk serial@a0000 arm,pl011 arm,primecell S
b � �uartclk apb_pclk serial@b0000 arm,pl011 arm,primecell S b � �uartclk apb_pclk serial@c0000 arm,pl011 arm,primecell S b � �uartclk apb_pclk watchdog@f0000 arm,sp805 arm,primecell S b � �wdog_clk apb_pclk timer@110000 arm,sp804 arm,primecell S b � �timclken1 timclken2 apb_pclk timer@120000 arm,sp804 arm,primecell S b � �timclken1 timclken2 apb_pclk virtio-block@130000 virtio,mmio S b * rtc@170000 arm,pl031 arm,primecell S b � �apb_pclk clcd@1f0000 arm,pl111 arm,primecell S �combined b � �clcdclk apb_pclk � port endpoint
m
virtio-p9@140000 virtio,mmio S b + virtio-net@150000 virtio,mmio S b , chosen aliases G 7/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@90000 G ?/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@a0000 G G/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@b0000 G O/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@c0000 psci
arm,psci-0.2 Wsmc cpus " 1 cpu@0 ^cpu
arm,armv8 S jpsci cpu@100 ^cpu
arm,armv8 S jpsci cpu@200 ^cpu
arm,armv8 S jpsci cpu@300 ^cpu
arm,armv8 S jpsci cpu@10000 ^cpu
arm,armv8 S jpsci cpu@10100 ^cpu
arm,armv8 S jpsci cpu@10200 ^cpu
arm,armv8 S jpsci cpu@10300 ^cpu
arm,armv8 S jpsci memory@80000000 ^memory S � � � � reserved-memory " 1 vram@18000000 shared-dma-pool S � x m interrupt-controller@2f000000 arm,gic-v3 " 1 P S / / , , ,� b m msi-controller@2f020000 � arm,gic-v3-its S / � m timer arm,armv8-timer 0 b
pmu arm,armv8-pmuv3 b spe-pmu ' arm,statistical-profiling-extension-v1 b pci@40000000 " 1 pci-host-ecam-generic ^pci � S @ P P � 2 � � � � � � � iommu@2b400000 arm,smmu-v3 S +@ 0 b J O K M �eventq gerror priq cmdq-sync � � � m panel arm,rtsm-display panel-dpi port endpoint
m
model compatible interrupt-parent #address-cells #size-cells #clock-cells clock-frequency clock-output-names phandle regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on arm,vexpress,config-bridge arm,vexpress-sysreg,func freq-range ranges #interrupt-cells interrupt-map-mask interrupt-map arm,v2m-memory-map reg bank-width interrupts gpio-controller #gpio-cells clocks clock-names assigned-clocks assigned-clock-parents cd-gpios wp-gpios max-frequency vmmc-supply interrupt-names memory-region remote-endpoint arm,pl11x,tft-r0g0b0-pads serial0 serial1 serial2 serial3 method device_type enable-method no-map interrupt-controller #msi-cells msi-controller bus-range msi-map iommu-map dma-coherent #iommu-cells msi-parent