�
�� z� H u, ( _ t� � fsl,lx2160a-qds fsl,lx2160a + 7NXP Layerscape LX2160AQDS aliases =/soc/timer@2800000 B/soc/crypto@8000000 I/soc/esdhc@2140000 N/soc/esdhc@2150000 S/soc/serial@21c0000 cpus + cpu@0 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@1 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@100 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@101 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@200 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@201 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@300 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@301 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@400 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@401 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@500 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@501 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@600 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � �
� � cpu@601 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � �
� � cpu@700 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � cpu@701 [cpu arm,cortex-a72 gpsci u y � � � @ � � � � � @ � � � � � l2-cache0 cache � � @ � l2-cache1 cache � � @ � l2-cache2 cache � � @ � l2-cache3 cache � � @ � l2-cache4 cache � � @ � l2-cache5 cache � � @ � l2-cache6 cache � � @ �
l2-cache7 cache � � @ � cpu-pw15 arm,idle-state PW15 , C � T � d p interrupt-controller@6000000 arm,gic-v3 P u
u + � � � gic-its@6020000 arm,gic-v3-its � u "