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Текущая директория: /usr/lib/firmware/5.15.0-160-generic/device-tree/freescale
Просмотр файла: imx8qxp-mek.dtb
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�� ^ 8 Y� ( g Y� ,Freescale i.MX8QXP MEK 2fsl,imx8qxp-mek fsl,imx8qxp aliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000 Q/bus@5d000000/gpio@5d080000 W/bus@5d000000/gpio@5d090000 ]/bus@5d000000/gpio@5d0a0000 c/bus@5d000000/gpio@5d0b0000 i/bus@5d000000/gpio@5d0c0000 o/bus@5d000000/gpio@5d0d0000 u/bus@5d000000/gpio@5d0e0000 {/bus@5d000000/gpio@5d0f0000 �/bus@5a000000/i2c@5a800000 �/bus@5a000000/i2c@5a810000 �/bus@5a000000/i2c@5a820000 �/bus@5a000000/i2c@5a830000 �/bus@5b000000/mmc@5b010000 �/bus@5b000000/mmc@5b020000 �/bus@5b000000/mmc@5b030000 �/bus@5d000000/mailbox@5d1b0000 �/bus@5d000000/mailbox@5d1c0000 �/bus@5d000000/mailbox@5d1d0000 �/bus@5d000000/mailbox@5d1e0000 �/bus@5d000000/mailbox@5d1f0000 �/bus@5a000000/serial@5a060000 �/bus@5a000000/serial@5a070000 �/bus@5a000000/serial@5a080000 �/bus@5a000000/serial@5a090000 cpus cpu@0 �cpu 2arm,cortex-a35 � �psci � � " 1
cpu@1 �cpu 2arm,cortex-a35 � �psci � � " 1 cpu@2 �cpu 2arm,cortex-a35 � �psci � � " 1 cpu@3 �cpu 2arm,cortex-a35 � �psci � � " 1
l2-cache0 2cache 1 opp-table 2operating-points-v2 9 1 opp-900000000 D 5�� K B@ Y I� opp-1200000000 D G�� K �� Y I� j interrupt-controller@51a00000 2arm,gic-v3 � Q� Q� v � � 1 reserved-memory � dsp@92400000 � �@ � 1 pmu 2arm,cortex-a35-pmu � psci
2arm,psci-1.0 �smc scu 2fsl,imx-scu
�tx0 rx0 gip3 $ � imx8qx-pd 2fsl,imx8qxp-scu-pd fsl,scu-pd � 1 clock-controller 2fsl,imx8qxp-clk � �xtal_32KHz xtal_24Mhz 1 pinctrl 2fsl,imx8qxp-iomuxc fec1grp � � 5 4 & % ' ( ) * , - . / 0 1 1 . ioexprstgrp � Z ! 1 ! isl29023grp � [ ! 1 # lpi2c1grp � ! ! 1 lpuart0grp � o p 1 usdhc1grp � � A
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! ! ! ! ! ! A 1 ' usdhc2grp T � A ! ! ! ! " ! # ! ! 1 ) imx8qx-ocotp 2fsl,imx8qxp-scu-ocotp scu-key " 2fsl,imx8qxp-sc-key fsl,imx-sc-key � t okay rtc 2fsl,imx8qxp-sc-rtc watchdog " 2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt < thermal-sensor * 2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal 1 timer 2arm,armv8-timer 0 �
clock-xtal32k 2fixed-clock � 5 � Extal_32KHz 1 clock-xtal24m 2fixed-clock � 5n6 Extal_24MHz 1 thermal-zones cpu-thermal0 X � n � | c trips trip0 � �� � � �passive 1 trip1 � � � � �critical cooling-maps map0 � 0 �
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�������� pmic-thermal0 X � n � | � trips trip0 � �� � � �passive 1 trip1 � �H � � �critical cooling-maps map0 � 0 �
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�������� bus@58000000 2simple-bus �X X clock-img-ipg 2fixed-clock � 5 �� Eimg_ipg_clk 1 jpegdec@58400000 �X@ 0 � 5 6 7 8 �per ipg � � �� �� ( � � � � � 2nxp,imx8qxp-jpgdec jpegenc@58450000 �XE 0 � 1 2 3 4 �per ipg � � �� �� ( � � � � � 2nxp,imx8qxp-jpgenc clock-controller@585d0000 2fsl,imx8qxp-lpcg �X] � � 0 Eimg_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk � 1 clock-controller@585f0000 2fsl,imx8qxp-lpcg �X_ � � 0 Eimg_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk � 1 bus@59000000 2simple-bus �Y Y clock-audio-ipg 2fixed-clock � 5' Eaudio_ipg_clk 1 clock-controller@59580000 2fsl,imx8qxp-lpcg �YX � � 4 Edsp_lpcg_adb_clk dsp_lpcg_ipg_clk dsp_lpcg_core_clk � 1 clock-controller@59590000 2fsl,imx8qxp-lpcg �YY � � Edsp_ram_lpcg_ipg_clk � 1 dsp@596e8000 2fsl,imx8qxp-dsp �Yn� � �ipg ocram core � � � �txdb0 txdb1 rxdb0 rxdb1 0 � � okay bus@5a000000 2simple-bus �Z Z clock-dma-ipg 2fixed-clock � 5' Edma_ipg_clk 1 serial@5a060000 �Z � � �ipg baud � 9 �Ĵ � 9 okay & 2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart default serial@5a070000 �Z � � �ipg baud � : �Ĵ � : disabled & 2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart serial@5a080000 �Z � � �ipg baud � ; �Ĵ � ; disabled & 2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart serial@5a090000 �Z � � �ipg baud � < �Ĵ � < disabled & 2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart clock-controller@5a460000 2fsl,imx8qxp-lpcg �ZF � 9 � ' Euart0_lpcg_baud_clk uart0_lpcg_ipg_clk � 9 1 clock-controller@5a470000 2fsl,imx8qxp-lpcg �ZG � : � ' Euart1_lpcg_baud_clk uart1_lpcg_ipg_clk � : 1 clock-controller@5a480000 2fsl,imx8qxp-lpcg �ZH � ; � ' Euart2_lpcg_baud_clk uart2_lpcg_ipg_clk � ; 1 clock-controller@5a490000 2fsl,imx8qxp-lpcg �ZI � < � ' Euart3_lpcg_baud_clk uart3_lpcg_ipg_clk � < 1 i2c@5a800000 �Z� @ � � �per � ` �n6 � ` disabled $ 2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c i2c@5a810000 �Z� @ � � �per � a �n6 � a okay $ 2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c 5 �� default ! i2c-mux@71 2nxp,pca9646 nxp,pca9546 � q " i2c@0 � gpio@68 2maxim,max7322 � h * : i2c@1 � i2c@2 � pressure-sensor@60 2fsl,mpl3115 � ` i2c@3 � gpio@1a 2nxp,pca9557 � * : gpio@1d 2nxp,pca9557 � * : light-sensor@44 default # 2isil,isl29023 � D " � i2c@5a820000 �Z� @ � � $ �per � b �n6 � b disabled $ 2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c i2c@5a830000 �Z� @ � � % �per � c �n6 � c disabled $ 2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c clock-controller@5ac00000 2fsl,imx8qxp-lpcg �Z� � ` � Ei2c0_lpcg_clk i2c0_lpcg_ipg_clk � ` 1 clock-controller@5ac10000 2fsl,imx8qxp-lpcg �Z� � a � Ei2c1_lpcg_clk i2c1_lpcg_ipg_clk � a 1 clock-controller@5ac20000 2fsl,imx8qxp-lpcg �Z� � b � Ei2c2_lpcg_clk i2c2_lpcg_ipg_clk � b 1 $ clock-controller@5ac30000 2fsl,imx8qxp-lpcg �Z� � c � Ei2c3_lpcg_clk i2c3_lpcg_ipg_clk � c 1 % bus@5b000000 2simple-bus �[ [ clock-conn-axi 2fixed-clock � 5�CU
Econn_axi_clk 1 2 clock-conn-ahb 2fixed-clock � 5 �!�
Econn_ahb_clk clock-conn-ipg 2fixed-clock � 5���
Econn_ipg_clk 1 1 mmc@5b010000 � � �[ & & & �ipg ahb per � � okay " 2fsl,imx8qxp-usdhc fsl,imx7d-usdhc � � � �� default ' F P V ^ mmc@5b020000 � � �[ ( ( ( �ipg ahb per � � l � okay " 2fsl,imx8qxp-usdhc fsl,imx7d-usdhc � � � �� default ) F � * � + � + mmc@5b030000 � � �[ , , , �ipg ahb per � � disabled " 2fsl,imx8qxp-usdhc fsl,imx7d-usdhc ethernet@5b040000 �[ 0 � - - - - �ipg ahb enet_clk_ref ptp � � � �沀sY@ � � � � okay . 2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec default . �rgmii-id � / � mdio ethernet-phy@0 2ethernet-phy-ieee802.3-c22 � 1 / ethernet@5b050000 �[ 0 � 0 0 0 0 �ipg ahb enet_clk_ref ptp � � � �沀sY@ � � � � disabled . 2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec clock-controller@5b200000 2fsl,imx8qxp-lpcg �[ � � 1 2 � 9 Esdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk � � 1 & clock-controller@5b210000 2fsl,imx8qxp-lpcg �[! � � 1 2 � 9 Esdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk � � 1 ( clock-controller@5b220000 2fsl,imx8qxp-lpcg �[" � � 1 2 � 9 Esdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk � � 1 , clock-controller@5b230000 2fsl,imx8qxp-lpcg �[# � 0 � � 2 � 1 1 � � Eenet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk � � 1 - clock-controller@5b240000 2fsl,imx8qxp-lpcg �[$ � 0 � � 2 � 1 1 � � Eenet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk � � 1 0 bus@5c000000 2simple-bus �\ \ ddr-pmu@5c020000 2fsl,imx8-ddr-pmu �\ � � bus@5d000000 2simple-bus �] ] clock-lsio-mem 2fixed-clock � 5 ��
Elsio_mem_clk clock-lsio-bus 2fixed-clock � 5��
Elsio_bus_clk 1 3 gpio@5d080000 �] � � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio gpio@5d090000 �] � � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio 1 " gpio@5d0a0000 �]
� � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio gpio@5d0b0000 �] � � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio gpio@5d0c0000 �] � � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio 1 + gpio@5d0d0000 �]
� � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio gpio@5d0e0000 �] � � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio gpio@5d0f0000 �] � � * : � v � � 2fsl,imx8qxp-gpio fsl,imx35-gpio mailbox@5d1b0000 �] � � � disabled 2fsl,imx8qxp-mu fsl,imx6sx-mu mailbox@5d1c0000 �] � � � - 2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu 1 mailbox@5d1d0000 �] � � � disabled - 2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu mailbox@5d1e0000 �] � � � disabled - 2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu mailbox@5d1f0000 �] � � � disabled - 2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu mailbox@5d280000 �]( � � � � � 2fsl,imx8qxp-mu fsl,imx6sx-mu 1 clock-controller@5d400000 2fsl,imx8qxp-lpcg �]@ � 4 � � � 3 � � h Epwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk � � clock-controller@5d410000 2fsl,imx8qxp-lpcg �]A � 4 � � � 3 � � h Epwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk � � clock-controller@5d420000 2fsl,imx8qxp-lpcg �]B � 4 � � � 3 � � h Epwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk � � clock-controller@5d430000 2fsl,imx8qxp-lpcg �]C � 4 � � � 3 � � h Epwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk � � clock-controller@5d440000 2fsl,imx8qxp-lpcg �]D � 4 � � � 3 � � h Epwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk � � clock-controller@5d450000 2fsl,imx8qxp-lpcg �]E � 4 � � � 3 � � h Epwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk � � clock-controller@5d460000 2fsl,imx8qxp-lpcg �]F � 4 � � � 3 � � h Epwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk � � clock-controller@5d470000 2fsl,imx8qxp-lpcg �]G � 4 � � � 3 � � h Epwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk � � chosen /bus@5a000000/serial@5a060000 memory@80000000 �memory � � @ usdhc2-vmmc 2regulator-fixed SD1_SPWR -� 7 -� O + T 1 * interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 device_type reg enable-method next-level-cache clocks operating-points-v2 #cooling-cells phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map mbox-names mboxes #power-domain-cells #clock-cells clock-names fsl,pins linux,keycodes status timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device assigned-clocks assigned-clock-rates power-domains clock-indices memory-region pinctrl-names pinctrl-0 reset-gpios gpio-controller #gpio-cells bus-width no-sd no-sdio non-removable fsl,tuning-start-tap fsl,tuning-step vmmc-supply cd-gpios wp-gpios fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet #mbox-cells stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high Выполнить команду
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