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�� $ 8 !T ( � ! ) microchip,sparx5-pcb125 microchip,sparx5 + 7Sparx5 PCB125 Reference Board aliases =/axi@600000000/spi@600104000 B/axi@600000000/serial@600100000 J/axi@600000000/serial@600102000 chosen Rserial0:115200n8 cpus + cpu-map cluster0 core0 ^ core1 ^ cpu@0 arm,cortex-a53 bcpu n rspin-table � � cpu@1 arm,cortex-a53 bcpu n rspin-table � � l2-cache0 cache � arm-pmu arm,cortex-a53-pmu � � psci
arm,psci-0.2 ysmc �disabled timer arm,armv8-timer 0 �
lcpll-clk fixed-clock � ˕� � clock-controller@61110000c microchip,sparx5-dpll � � n $ �
ahb-clk fixed-clock � �沀 � sys-clk fixed-clock � �%@�@ � axi@600000000 simple-bus + � interrupt-controller@600300000 arm,gic-v3 � + � < n 0 4 ! " � � syscon@600000000 . microchip,sparx5-cpu-syscon syscon simple-mfd n � � mux-controller mmio-mux " � � �
reset-controller@611010008 microchip,sparx5-switch-reset n 0gcb : G � serial@600100000 R \default ns16550a n � j w � �okay serial@600102000 R \default ns16550a n � j w �
�okay spi@600104000 + microchip,sparx5-spi n @ @ � j w � �
�okay spi@0 spi-mux �
+ n spi-flash@9 jedec,spi-nor � z n spi@1 spi-mux �
+ n spi-flash@9 spi-nand R \default � z n timer@600105000 snps,dw-apb-timer n P � �timer � mmc@600800000 microchip,dw-sparx5-sdhci �okay n � R \default �
�core �
�/� � � � � z �
pinctrl@6110101e0 microchip,sparx5-pinctrl n � � P� " @ � � � � cs1-pins .GPIO_16 3si � cs2-pins .GPIO_17 3si cs3-pins .GPIO_18 3si si2-pins .GPIO_39 GPIO_40 GPIO_41 3si2 sgpio-pins .GPIO_0 GPIO_1 GPIO_2 GPIO_3 3sg0 � sgpio1-pins .GPIO_4 GPIO_5 GPIO_12 GPIO_13 3sg1 � sgpio2-pins .GPIO_30 GPIO_31 GPIO_32 GPIO_33 3sg2 � uart-pins .GPIO_10 GPIO_11 3uart � uart2-pins .GPIO_26 GPIO_27 3uart2 � i2c-pins .GPIO_14 GPIO_15 3twi � i2c2-pins .GPIO_28 GPIO_29 3twi2 � emmc-pins X .GPIO_34 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 3emmc < � miim1-pins .GPIO_56 GPIO_57 3miim � miim2-pins .GPIO_58 GPIO_59 3miim � miim3-pins .GPIO_52 GPIO_53 3miim � gpio@61101036c + microchip,sparx5-sgpio �okay � R \default K Rswitch n l ^ gpio@0 microchip,sparx5-sgpio-bank n z ` � � � gpio@1 microchip,sparx5-sgpio-bank n z ` gpio@611010484 + microchip,sparx5-sgpio �disabled � R \default K Rswitch n � gpio@0 microchip,sparx5-sgpio-bank n z ` � � � gpio@1 microchip,sparx5-sgpio-bank n z ` gpio@61101059c + microchip,sparx5-sgpio �disabled � R \default K Rswitch n � gpio@0 n microchip,sparx5-sgpio-bank z ` � � � gpio@1 microchip,sparx5-sgpio-bank n z ` i2c@600101000 snps,designware-i2c �okay R \default n + � � , � �� � i2c@600103000 snps,designware-i2c �okay R \default n 0 + � � , � �� � tmon@610508110 microchip,sparx5-temp n P� � � mdio@6110102b0 mscc,ocelot-miim �disabled + n � $ mdio@6110102d4 mscc,ocelot-miim �disabled R \default + n � $ mdio@6110102f8 mscc,ocelot-miim �disabled R \default + n � $ mdio@61101031c mscc,ocelot-miim �disabled R \default + n $ serdes@10808000 microchip,sparx5-serdes � � n �� ] switch@0x600000000 microchip,sparx5-switch $ n @ @ � � 0cpu dev gcb �xtr fdma � K Rswitch memory@0 bmemory n compatible interrupt-parent #address-cells #size-cells model spi0 serial0 serial1 stdout-path cpu device_type reg enable-method next-level-cache phandle interrupts interrupt-affinity status #clock-cells clock-frequency clocks ranges #interrupt-cells interrupt-controller #mux-control-cells mux-reg-masks reg-names #reset-cells cpu-syscon pinctrl-0 pinctrl-names reg-io-width reg-shift num-cs mux-controls spi-max-frequency clock-names assigned-clocks assigned-clock-rates bus-width non-removable microchip,clock-delay gpio-controller #gpio-cells gpio-ranges pins function drive-strength resets reset-names microchip,sgpio-port-ranges ngpios i2c-sda-hold-time-ns #thermal-sensor-cells #phy-cells interrupt-names