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�� _� 8 [� ( [p ) microchip,sparx5-pcb134 microchip,sparx5 + % 7Sparx5 PCB134 Reference Board (NAND) aliases =/axi@600000000/spi@600104000 B/axi@600000000/serial@600100000 J/axi@600000000/serial@600102000 chosen Rserial0:115200n8 cpus + cpu-map cluster0 core0 ^ core1 ^ cpu@0 arm,cortex-a53 bcpu n rspin-table � � cpu@1 arm,cortex-a53 bcpu n rspin-table � � l2-cache0 cache � arm-pmu arm,cortex-a53-pmu � � psci
arm,psci-0.2 ysmc �disabled timer arm,armv8-timer 0 �
lcpll-clk fixed-clock � ˕� � clock-controller@61110000c microchip,sparx5-dpll � � n $ � ahb-clk fixed-clock � �沀 � sys-clk fixed-clock � �%@�@ � axi@600000000 simple-bus + � interrupt-controller@600300000 arm,gic-v3 � + � < n 0 4 ! " � � syscon@600000000 . microchip,sparx5-cpu-syscon syscon simple-mfd n � � mux-controller mmio-mux " � � � reset-controller@611010008 microchip,sparx5-switch-reset n 0gcb : G � serial@600100000 R \default ns16550a n � j w � �okay serial@600102000 R \default ns16550a n � j w �
�okay spi@600104000 + microchip,sparx5-spi n @ @ � j w � �
�okay R
\default spi-flash@0 jedec,spi-nor � z n spi@0 spi-mux � + n spi-flash@9 jedec,spi-nor � z n spi@e spi-mux � + n spi-flash@6 spi-nand R \default n ��ހ � timer@600105000 snps,dw-apb-timer n P � �timer � mmc@600800000 microchip,dw-sparx5-sdhci �disabled n � R
\default � �core � �/� � � pinctrl@6110101e0 microchip,sparx5-pinctrl n � � P� � @ � � � � cs1-pins GPIO_16 "si cs2-pins GPIO_17 "si cs3-pins GPIO_18 "si si2-pins GPIO_39 GPIO_40 GPIO_41 "si2 �
sgpio-pins GPIO_0 GPIO_1 GPIO_2 GPIO_3 "sg0 � sgpio1-pins GPIO_4 GPIO_5 GPIO_12 GPIO_13 "sg1 � sgpio2-pins GPIO_30 GPIO_31 GPIO_32 GPIO_33 "sg2 � uart-pins GPIO_10 GPIO_11 "uart � uart2-pins GPIO_26 GPIO_27 "uart2 � i2c-pins GPIO_14 GPIO_15 "twi � i2c2-pins GPIO_28 GPIO_29 "twi2 � emmc-pins p GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 "emmc �
miim1-pins GPIO_56 GPIO_57 "miim � miim2-pins GPIO_58 GPIO_59 "miim � miim3-pins GPIO_52 GPIO_53 "miim � i2cmux-pins-i ` GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_22 GPIO_36 GPIO_35 GPIO_50 GPIO_51 GPIO_56 GPIO_57
"twi_scl_m + � = i2cmux-0 GPIO_16
"twi_scl_m 6 � 1 i2cmux-1 GPIO_17
"twi_scl_m 6 � 2 i2cmux-2 GPIO_18
"twi_scl_m 6 � 3 i2cmux-3 GPIO_19
"twi_scl_m 6 � 4 i2cmux-4 GPIO_20
"twi_scl_m 6 � 5 i2cmux-5 GPIO_22
"twi_scl_m 6 � 6 i2cmux-6 GPIO_36
"twi_scl_m 6 � 7 i2cmux-7 GPIO_35
"twi_scl_m 6 � 8 i2cmux-8 GPIO_50
"twi_scl_m 6 � 9 i2cmux-9 GPIO_51
"twi_scl_m 6 � : i2cmux-10 GPIO_56
"twi_scl_m 6 � ; i2cmux-11 GPIO_57
"twi_scl_m 6 � < cs14-pins GPIO_44 "si � gpio@61101036c + microchip,sparx5-sgpio �okay � R \default B Iswitch n l U gpio@0 microchip,sparx5-sgpio-bank n � q @ � � � gpio@1 microchip,sparx5-sgpio-bank n � q @ � T gpio@611010484 + microchip,sparx5-sgpio �okay � R \default B Iswitch n � U gpio@0 microchip,sparx5-sgpio-bank n � q @ � � � gpio@1 microchip,sparx5-sgpio-bank n � q @ � U gpio@61101059c + microchip,sparx5-sgpio �okay � R \default B Iswitch n � U gpio@0 n microchip,sparx5-sgpio-bank � q ` � � � � @ gpio@1 microchip,sparx5-sgpio-bank n � q ` � ? i2c@600101000 snps,designware-i2c �okay R \default n + � x , � �� � � 0 i2c@600103000 snps,designware-i2c �disabled R \default n 0 + � x , � �� � tmon@610508110 microchip,sparx5-temp n P� � � mdio@6110102b0 mscc,ocelot-miim �disabled + n � $ mdio@6110102d4 mscc,ocelot-miim �disabled R \default + n � $ mdio@6110102f8 mscc,ocelot-miim �disabled R \default + n � $ mdio@61101031c mscc,ocelot-miim �ok R \default + n $ ethernet-phy@64 n � / serdes@10808000 microchip,sparx5-serdes � � n �� ] � switch@0x600000000 microchip,sparx5-switch $ n @ @ � � 0cpu dev gcb �xtr fdma � B Iswitch ethernet-ports + port@12 n � ' �
�10gbase-r � � - �in-band-status port@13 n
� ' �
�10gbase-r � � 1 �in-band-status port@14 n � ' �
�10gbase-r � � 5 �in-band-status port@15 n � ' �
�10gbase-r � � 9 �in-band-status port@48 n 0 � ' �
�10gbase-r � � = �in-band-status port@49 n 1 � ' �
�10gbase-r � � A �in-band-status port@50 n 2 � ' �
�10gbase-r � ! � E �in-band-status port@51 n 3 � ' �
�10gbase-r � " � I �in-band-status port@52 n 4 � ' �
�10gbase-r � # � M �in-band-status port@53 n 5 � ' �
�10gbase-r � $ � Q �in-band-status port@54 n 6 � ' �
�10gbase-r � % � U �in-band-status port@55 n 7 � ' �
�10gbase-r � & � Y �in-band-status port@56 n 8 � ' �
�10gbase-r � ' � ] �in-band-status port@57 n 9 � ' �
�10gbase-r � ( � a �in-band-status port@58 n : � ' �
�10gbase-r � ) � e �in-band-status port@59 n ; � ' �
�10gbase-r � * � i �in-band-status port@60 n < � ' �
�10gbase-r � + � m �in-band-status port@61 n = � ' �
�10gbase-r � , � q �in-band-status port@62 n > � ' �
�10gbase-r � - � u �in-band-status port@63 n ? � ' �
�10gbase-r � . � y �in-band-status port@64 n @ � � � � / �sgmii i2c0-imux@0 i2c-mux-pinctrl +
0 t \i2c_sfp1 i2c_sfp2 i2c_sfp3 i2c_sfp4 i2c_sfp5 i2c_sfp6 i2c_sfp7 i2c_sfp8 i2c_sfp9 i2c_sfp10 i2c_sfp11 i2c_sfp12 idle R 1 2 3 ) 4 3 5 = 6 G 7 Q 8 [ 9 e : o ; z < � = i2c_sfp1 n + � > i2c_sfp2 n + � A i2c_sfp3 n + � B i2c_sfp4 n + � C i2c_sfp5 n + � D i2c_sfp6 n + � E i2c_sfp7 n + � F i2c_sfp8 n + � G i2c_sfp9 n + � H i2c_sfp10 n + � I i2c_sfp11 n
+ � J i2c_sfp12 n + � K i2c0-emux@0
i2c-mux-gpio +
0 0 � 7 < = 6 � i2c_sfp13 n + � L i2c_sfp14 n + � M i2c_sfp15 n + � N i2c_sfp16 n + � O i2c_sfp17 n + � P i2c_sfp18 n + � Q i2c_sfp19 n + � R i2c_sfp20 n + � S sfp-eth12 sff,sfp � > � ? � @ � @ � @ � sfp-eth13 sff,sfp � A � ? � @ � @ � @
� sfp-eth14 sff,sfp � B � ?
� @
� @
� @ � sfp-eth15 sff,sfp � C � ? � @ � @ � @ � sfp-eth48 sff,sfp � D � ? � @ � @ � @ � sfp-eth49 sff,sfp � E � ? � @ � @ � @ � sfp-eth50 sff,sfp � F � ? � @ � @ � @ � ! sfp-eth51 sff,sfp � G � ? � @ � @ � @ � " sfp-eth52 sff,sfp � H � ? � @ � @ � @ � # sfp-eth53 sff,sfp � I � ? � @ � @ � @ � $ sfp-eth54 sff,sfp � J � ? � @ � @ � @ � % sfp-eth55 sff,sfp � K � ? � @ � @ � @ � & sfp-eth56 sff,sfp � L � ? � @ � @ � @ � ' sfp-eth57 sff,sfp � M � ? � @ � @ � @ � ( sfp-eth58 sff,sfp � N � ? � @ � @ � @ � ) sfp-eth59 sff,sfp � O � ? � @ � @ � @ � * sfp-eth60 sff,sfp � P � ? � @ � @ � @ � + sfp-eth61 sff,sfp � Q � ? � @ � @ � @ � , sfp-eth62 sff,sfp � R � ? � @ � @ � @ � - sfp-eth63 sff,sfp � S � ? � @ � @ � @ � . gpio-restart
gpio-restart r % � � leds
gpio-leds led@0 �twr0:green r T led@1 �twr0:yellow r T led@2 �twr1:green r T led@3 �twr1:yellow r T led@4 �twr2:green r T
led@5 �twr2:yellow r T
led@6 �twr3:green r T led@7 �twr3:yellow r T led@8 �eth12:green r T �off led@9
�eth12:yellow r T �off led@10 �eth13:green r T
�off led@11
�eth13:yellow r T
�off led@12 �eth14:green r T �off led@13
�eth14:yellow r T �off led@14 �eth15:green r T �off led@15
�eth15:yellow r T �off led@16 �eth48:green r U �off led@17
�eth48:yellow r U �off led@18 �eth49:green r U �off led@19
�eth49:yellow r U �off led@20 �eth50:green r U �off led@21
�eth50:yellow r U �off led@22 �eth51:green r U �off led@23
�eth51:yellow r U �off led@24 �eth52:green r U �off led@25
�eth52:yellow r U �off led@26 �eth53:green r U �off led@27
�eth53:yellow r U �off led@28 �eth54:green r U �off led@29
�eth54:yellow r U �off led@30 �eth55:green r U �off led@31
�eth55:yellow r U �off led@32 �eth56:green r U �off led@33
�eth56:yellow r U �off led@34 �eth57:green r U �off led@35
�eth57:yellow r U �off led@36 �eth58:green r U �off led@37
�eth58:yellow r U �off led@38 �eth59:green r U �off led@39
�eth59:yellow r U �off led@40 �eth60:green r U �off led@41
�eth60:yellow r U �off led@42 �eth61:green r U �off led@43
�eth61:yellow r U �off led@44 �eth62:green r U �off led@45
�eth62:yellow r U �off led@46 �eth63:green r U �off led@47
�eth63:yellow r U �off memory@0 bmemory n compatible interrupt-parent #address-cells #size-cells model spi0 serial0 serial1 stdout-path cpu device_type reg enable-method next-level-cache phandle interrupts interrupt-affinity status #clock-cells clock-frequency clocks ranges #interrupt-cells interrupt-controller #mux-control-cells mux-reg-masks reg-names #reset-cells cpu-syscon pinctrl-0 pinctrl-names reg-io-width reg-shift num-cs spi-max-frequency mux-controls rx-sample-delay-ns clock-names assigned-clocks assigned-clock-rates bus-width gpio-controller #gpio-cells gpio-ranges pins function output-low output-high resets reset-names microchip,sgpio-port-ranges ngpios i2c-sda-hold-time-ns #thermal-sensor-cells #phy-cells interrupt-names microchip,bandwidth phys phy-mode sfp microchip,sd-sgpio managed phy-handle i2c-parent pinctrl-1 pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 pinctrl-6 pinctrl-7 pinctrl-8 pinctrl-9 pinctrl-10 pinctrl-11 pinctrl-12 mux-gpios idle-state i2c-bus tx-disable-gpios los-gpios mod-def0-gpios tx-fault-gpios priority label default-state