�
�� Ӭ 8 �� ( � ̸ & hoperun,hihope-rzg2n renesas,r8a774b1 3 &HopeRun HiHope RZ/G2N main board based on r8a774b1 audio_clk_a fixed-clock , 9X� I 1 audio_clk_b fixed-clock , 9 audio_clk_c fixed-clock , 9 I 2 can fixed-clock , 9 I opp_table0 operating-points-v2 Q I opp-500000000 \ �e c �0 q �� opp-1000000000 \ ;�� c �0 q �� opp-1500000000 \ Yh/ c �0 q �� � cpus cpu@0 arm,cortex-a57 � �cpu � � �psci � � V � � I cpu@1 arm,cortex-a57 � �cpu � � �psci � � I cache-controller-0 cache � I extal fixed-clock , 9 �P* I
extalr fixed-clock , 9 � I pcie_bus fixed-clock , 9�� I L pmu_a57 arm,cortex-a57-pmu ) H I = psci arm,psci-1.0 arm,psci-0.2 �smc scif fixed-clock , 9 � I soc simple-bus P a watchdog@e6020000 + renesas,r8a774b1-wdt renesas,rcar-gen3-wdt � � � � � h � ookay v < gpio@e6050000 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � � P � � � � � � � � � h � I o gpio@e6051000 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � � P � � � � � � � � � h � gpio@e6052000 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � � P � � � � @ � � � � � h � I I gpio@e6053000 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � �0 P � � � � ` � � � � � h � I gpio@e6054000 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � �@ P � � � � � � � � � � h � I q gpio@e6055000 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � �P P � � � � � � � � � � h � gpio@e6055400 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � �T P �
� � � � � � � � � h � I n usb1-reset � �
� �usb1-reset gpio@e6055800 - renesas,gpio-r8a774b1 renesas,rcar-gen3-gpio � �X P � � � � � � � � � � h � pinctrl@e6060000 renesas,pfc-r8a774b1 � � � default I hscif0 hscif0_data hscif0_ctrl hscif0 I scif2
scif2_data_a scif2 I scif_clk scif_clk_a scif_clk I sd0 sdhi0_data4 sdhi0_ctrl sdhi0 ' � I C sd0_uhs sdhi0_data4 sdhi0_ctrl sdhi0 ' I D sd2 sdhi2_data4 sdhi2_ctrl sdhi2 ' I G sd3 sdhi3_data8 sdhi3_ctrl sdhi3_ds sdhi3 ' I J usb0 usb0 usb0 I @ usb1 I B mux usb1 usb1 ovc 4GP_6_27 9 usb30 usb30 usb30 I : i2c2 i2c2_a i2c2 I sound_clk + audio_clk_a_a audio_clk_b_a audio_clkout_a
audio_clk I 4 sound $ ssi01239_ctrl ssi0_data ssi1_data_a ssi I 3 timer@e60f0000 - renesas,r8a774b1-cmt0 renesas,rcar-gen3-cmt0 � � � � � � / Ffck � h / odisabled timer@e6130000 - renesas,r8a774b1-cmt1 renesas,rcar-gen3-cmt1 � � ` � x y z { | } ~ � . Ffck � h . odisabled timer@e6140000 - renesas,r8a774b1-cmt1 renesas,rcar-gen3-cmt1 � � ` � � � � � � � � � � - Ffck � h - odisabled timer@e6148000 - renesas,r8a774b1-cmt1 renesas,rcar-gen3-cmt1 � �� ` � � � � � � � � � � , Ffck � h , odisabled clock-controller@e6150000 renesas,r8a774b1-cpg-mssr � � �
Fextal extalr , R f I reset-controller@e6160000 renesas,r8a774b1-rst � � system-controller@e6180000 renesas,r8a774b1-sysc � � R I thermal@e6198000 renesas,r8a774b1-thermal 0 � �� � �� $ � C D E �
� h
s I k interrupt-controller@e61c0000 & renesas,intc-ex-r8a774b1 renesas,irqc � � � � H � � � � � h � timer@e61e0000 ! renesas,tmu-r8a774b1 renesas,tmu � � 0 $ � � � � � } Ffck � h } odisabled timer@e6fc0000 ! renesas,tmu-r8a774b1 renesas,tmu � � 0 $ � � � � � | Ffck � h | odisabled timer@e6fd0000 ! renesas,tmu-r8a774b1 renesas,tmu � � 0 $ � / 0 1 � { Ffck � h { odisabled timer@e6fe0000 ! renesas,tmu-r8a774b1 renesas,tmu � � 0 $ � � � � � z Ffck � h z odisabled timer@ffc00000 ! renesas,tmu-r8a774b1 renesas,tmu � �� 0 $ � � � � � y Ffck � h y odisabled i2c@e6500000 + renesas,i2c-r8a774b1 renesas,rcar-gen3-i2c � �P @ � � � � h � � � �
�
� �tx rx tx rx � n odisabled i2c@e6508000 + renesas,i2c-r8a774b1 renesas,rcar-gen3-i2c � �P� @ � � � � h � � � �
�
� �tx rx tx rx � odisabled i2c@e6510000 + renesas,i2c-r8a774b1 renesas,rcar-gen3-i2c � �Q @ � � � � h � � � �
�
� �tx rx tx rx � ookay � default clk_multiplier@4f , cirrus,cs2000-cp � O � Fclk_in ref_clk � �w I i2c@e66d0000 + renesas,i2c-r8a774b1 renesas,rcar-gen3-i2c � �m @ � " � � � h � � � � �tx rx � n odisabled i2c@e66d8000 + renesas,i2c-r8a774b1 renesas,rcar-gen3-i2c � �m� @ � � � � h � � � � �tx rx � n ookay 9 � clock-generator@6a idt,5p49v5923 � j , � Fxin I d i2c@e66e0000 + renesas,i2c-r8a774b1 renesas,rcar-gen3-i2c � �n @ � � � � h � � � � �tx rx � n odisabled i2c@e66e8000 + renesas,i2c-r8a774b1 renesas,rcar-gen3-i2c � �n� @ � � � � h � � � � �tx rx � odisabled i2c@e60b0000 ? renesas,iic-r8a774b1 renesas,rcar-gen3-iic renesas,rmobile-iic � � % � � � � � h � � �tx rx odisabled serial@e6540000 = renesas,hscif-r8a774b1 renesas,rcar-gen3-hscif renesas,hscif � �T ` � � � Ffck brg_int scif_clk � 1 0
1
0 �tx rx tx rx � h ookay � default � bluetooth
ti,wl1837-st �
serial@e6550000 = renesas,hscif-r8a774b1 renesas,rcar-gen3-hscif renesas,hscif � �U ` � � � Ffck brg_int scif_clk � 3 2
3
2 �tx rx tx rx � h odisabled serial@e6560000 = renesas,hscif-r8a774b1 renesas,rcar-gen3-hscif renesas,hscif � �V ` � � � Ffck brg_int scif_clk � 5 4
5
4 �tx rx tx rx � h odisabled serial@e66a0000 = renesas,hscif-r8a774b1 renesas,rcar-gen3-hscif renesas,hscif � �j ` � � � Ffck brg_int scif_clk � 7 6 �tx rx � h odisabled serial@e66b0000 = renesas,hscif-r8a774b1 renesas,rcar-gen3-hscif renesas,hscif � �k ` � � � Ffck brg_int scif_clk � 9 8 �tx rx � h odisabled usb@e6590000 / renesas,usbhs-r8a774b1 renesas,rcar-gen3-usbhs � �Y � k � � � � �ch0 ch1 ch2 ch3 � usb � h � � ookay otg clock-controller@e6590630 F renesas,r8a774b1-rcar-usb2-clock-sel renesas,rcar-gen3-usb2-clock-sel � �Y0 � � � ' Fehci_ohci hs-usb-if usb_extal usb_xtal , � h � � ehci_ohci hs-usb-if odisabled dma-controller@e65a0000 + renesas,r8a774b1-usb-dmac renesas,usb-dmac � �Z � m m 'ch0 ch1 � J � h J 7 B I dma-controller@e65b0000 + renesas,r8a774b1-usb-dmac renesas,usb-dmac � �[ � n n 'ch0 ch1 � K � h K 7 B I usb-phy@e65ee000 5 renesas,r8a774b1-usb3-phy renesas,rcar-gen3-usb3-phy � �^� � � H Fusb3-if usb3s_clk usb_extal � h H O ookay I ; dma-controller@e6700000 ( renesas,dmac-r8a774b1 renesas,rcar-dmac � �p � � � � � � � � � � � � � � � � � � � L 'error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15 � � Ffck � h � 7 B � Z
I dma-controller@e7300000 ( renesas,dmac-r8a774b1 renesas,rcar-dmac � �0 � � � � � � � 4 5 6 7 8 9 : ; < = > ? L 'error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15 � � Ffck � h � 7 B � Z
I dma-controller@e7310000 ( renesas,dmac-r8a774b1 renesas,rcar-dmac � �1 � � � � � � � � � � � � � � � � � � � L 'error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15 � � Ffck � h � 7 B � Z I
iommu@e6740000 renesas,ipmmu-r8a774b1 � �t a � t I iommu@e7740000 renesas,ipmmu-r8a774b1 � �t a � t I iommu@e6570000 renesas,ipmmu-r8a774b1 � �W a � t iommu@e67b0000 renesas,ipmmu-r8a774b1 � �{ � � � � t I iommu@ec670000 renesas,ipmmu-r8a774b1 � �g a � t iommu@fd800000 renesas,ipmmu-r8a774b1 � �� a � t iommu@fe6b0000 renesas,ipmmu-r8a774b1 � �k a � t iommu@febd0000 renesas,ipmmu-r8a774b1 � �� a � t iommu@fe990000 renesas,ipmmu-r8a774b1 � �� a � t ethernet@e6800000 5 renesas,etheravb-r8a774b1 renesas,etheravb-rcar-gen3 � � , � ' ( ) * + , - . / 0 1 2 3 4 5 6 7 8 9 : ; < = > ? s 'ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15 ch16 ch17 ch18 ch19 ch20 ch21 ch22 ch23 ch24 � , Ffck � h , �rgmii � � Z odisabled can@e6c30000 + renesas,can-r8a774b1 renesas,rcar-gen3-can � �� � � � � , Fclkp1 clkp2 can_clk � , �bZ � h � odisabled can@e6c38000 + renesas,can-r8a774b1 renesas,rcar-gen3-can � �À � � � � , Fclkp1 clkp2 can_clk � , �bZ � h � odisabled can@e66c0000 / renesas,r8a774b1-canfd renesas,rcar-gen3-canfd � �l � � � � , Ffck canfd can_clk � , �bZ � h � odisabled channel0 odisabled channel1 odisabled pwm@e6e30000 & renesas,pwm-r8a774b1 renesas,pwm-rcar � �� � � h � odisabled pwm@e6e31000 & renesas,pwm-r8a774b1 renesas,pwm-rcar � �� � � h � odisabled pwm@e6e32000 & renesas,pwm-r8a774b1 renesas,pwm-rcar � �� � � h � odisabled pwm@e6e33000 & renesas,pwm-r8a774b1 renesas,pwm-rcar � ��0 � � h � odisabled pwm@e6e34000 & renesas,pwm-r8a774b1 renesas,pwm-rcar � ��@ � � h � odisabled pwm@e6e35000 & renesas,pwm-r8a774b1 renesas,pwm-rcar � ��P � � h � odisabled pwm@e6e36000 & renesas,pwm-r8a774b1 renesas,pwm-rcar � ��` � � h � odisabled serial@e6e60000 : renesas,scif-r8a774b1 renesas,rcar-gen3-scif renesas,scif � �� @ � � � � Ffck brg_int scif_clk � Q P
Q
P �tx rx tx rx � h � odisabled serial@e6e68000 : renesas,scif-r8a774b1 renesas,rcar-gen3-scif renesas,scif � �� @ � � � � Ffck brg_int scif_clk � S R
S
R �tx rx tx rx � h � odisabled serial@e6e88000 : renesas,scif-r8a774b1 renesas,rcar-gen3-scif renesas,scif � �� @ � � � 6 Ffck brg_int scif_clk �
�tx rx tx rx � h 6 ookay � default serial@e6c50000 : renesas,scif-r8a774b1 renesas,rcar-gen3-scif renesas,scif � �� @ � � � Ffck brg_int scif_clk � W V �tx rx � h � odisabled serial@e6c40000 : renesas,scif-r8a774b1 renesas,rcar-gen3-scif renesas,scif � �� @ � � � Ffck brg_int scif_clk � Y X �tx rx � h � odisabled serial@e6f30000 : renesas,scif-r8a774b1 renesas,rcar-gen3-scif renesas,scif � �� @ � � � Ffck brg_int scif_clk � [ Z
[
Z �tx rx tx rx � h � odisabled spi@e6e90000 / renesas,msiof-r8a774b1 renesas,rcar-gen3-msiof � �� d � � � � � A @
A
@ �tx rx tx rx � h � odisabled spi@e6ea0000 / renesas,msiof-r8a774b1 renesas,rcar-gen3-msiof � �� d � � � � � C B
C
B �tx rx tx rx � h � odisabled spi@e6c00000 / renesas,msiof-r8a774b1 renesas,rcar-gen3-msiof � � d � � � � � E D �tx rx � h � odisabled spi@e6c10000 / renesas,msiof-r8a774b1 renesas,rcar-gen3-msiof � � d � � � � � G F �tx rx � h � odisabled video@e6ef0000 renesas,vin-r8a774b1 � �� � � � + � h + � odisabled ports port@1 � endpoint@0 � � ! I R endpoint@2 � � " I Z video@e6ef1000 renesas,vin-r8a774b1 � �� � � � * � h * � odisabled ports port@1 � endpoint@0 � � # I S endpoint@2 � � $ I [ video@e6ef2000 renesas,vin-r8a774b1 � �� � � � ) � h ) � odisabled ports port@1 � endpoint@0 � � % I T endpoint@2 � � & I \ video@e6ef3000 renesas,vin-r8a774b1 � ��0 � � � ( � h ( � odisabled ports port@1 � endpoint@0 � � ' I U endpoint@2 � � ( I ] video@e6ef4000 renesas,vin-r8a774b1 � ��@ � � � ' � h ' � odisabled ports port@1 � endpoint@0 � � ) I V endpoint@2 � � * I ^ video@e6ef5000 renesas,vin-r8a774b1 � ��P � � � & � h & � odisabled ports port@1 � endpoint@0 � � + I W endpoint@2 � � , I _ video@e6ef6000 renesas,vin-r8a774b1 � ��` � � � % � h % � odisabled ports port@1 � endpoint@0 � � - I X endpoint@2 � � . I ` video@e6ef7000 renesas,vin-r8a774b1 � ��p � � � $ � h $ � odisabled ports port@1 � endpoint@0 � � / I Y endpoint@2 � � 0 I a sound@ec500000 4 renesas,rcar_sound-r8a774b1 renesas,rcar_sound-gen3 P � �P �Z �T �T � �v �scu adg ssiu ssi audmapp \ � � � � � � � � � � � � � � � � � � � � 1 2 � Fssi-all ssi.9 ssi.8 ssi.7 ssi.6 ssi.5 ssi.4 ssi.3 ssi.2 ssi.1 ssi.0 src.9 src.8 src.7 src.6 src.5 src.4 src.3 src.2 src.1 src.0 mix.1 mix.0 ctu.1 ctu.0 dvc.0 dvc.1 clk_a clk_b clk_c clk_i � X h � � � � � � � � � � � D ssi-all ssi.9 ssi.8 ssi.7 ssi.6 ssi.5 ssi.4 ssi.3 ssi.2 ssi.1 ssi.0 ookay � 3 4 default � , 9 �� �D rcar_sound,ctu ctu-0 ctu-1 ctu-2 ctu-3 ctu-4 ctu-5 ctu-6 ctu-7 rcar_sound,dvc dvc-0 � 5 � �tx dvc-1 � 5 � �tx rcar_sound,mix mix-0 mix-1 rcar_sound,src src-0 � ` � 6 � 5 � �rx tx src-1 � a � 6 � 5 � �rx tx src-2 � b � 6 � 5 � �rx tx src-3 � c � 6 � 5 � �rx tx src-4 � d � 6 � 5 � �rx tx src-5 � e � 6 � 5 � �rx tx src-6 � f � 6 � 5 � �rx tx src-7 � g � 6 � 5 � �rx tx src-8 � h � 6 � 5 � �rx tx src-9 � i � 6 � 5 � �rx tx rcar_sound,ssi ssi-0 � r � 6 5 �rx tx ssi-1 � s � 6 5 �rx tx ssi-2 � t � 6 5 �rx tx I 9 ssi-3 � u � 6 5 �rx tx ssi-4 � v � 6 5
�rx tx ssi-5 � w � 6 5 �rx tx ssi-6 � x � 6
5 �rx tx ssi-7 � y � 6 5 �rx tx ssi-8 � z � 6 5 �rx tx ssi-9 � { � 6 5 �rx tx rcar_sound,ssiu ssiu-0 � 6 5 �rx tx ssiu-1 � 6 5 5 6 �rx tx ssiu-2 � 6 7 5 8 �rx tx ssiu-3 � 6 G 5 H �rx tx ssiu-4 � 6 ? 5 @ �rx tx ssiu-5 � 6 C 5 D �rx tx ssiu-6 � 6 O 5 P �rx tx ssiu-7 � 6 S 5 T �rx tx ssiu-8 � 6 I 5 J �rx tx ssiu-9 � 6 K 5 L �rx tx ssiu-10 � 6 W 5 X �rx tx ssiu-11 � 6 Y 5 Z �rx tx ssiu-12 � 6 _ 5 ` �rx tx ssiu-13 � 6 � 5 � �rx tx ssiu-14 � 6 � 5 � �rx tx ssiu-15 � 6 � 5 � �rx tx ssiu-16 � 6 c 5 d �rx tx ssiu-17 � 6 g 5 h �rx tx ssiu-18 � 6 k 5 l �rx tx ssiu-19 � 6 m 5 n �rx tx ssiu-20 � 6 � 5 � �rx tx ssiu-21 � 6 � 5 � �rx tx ssiu-22 � 6 � 5 � �rx tx ssiu-23 � 6 � 5 � �rx tx ssiu-24 � 6 o 5 p �rx tx ssiu-25 � 6 ! 5 " �rx tx ssiu-26 � 6 # 5 $ �rx tx ssiu-27 � 6 % 5 & �rx tx ssiu-28 � 6 ' 5 ( �rx tx ssiu-29 � 6 ) 5 * �rx tx ssiu-30 � 6 + 5 , �rx tx ssiu-31 � 6 - 5 . �rx tx ssiu-32 � 6 q 5 r �rx tx ssiu-33 � 6 5 �rx tx ssiu-34 � 6 5 �rx tx ssiu-35 � 6 5 �rx tx ssiu-36 � 6 5 �rx tx ssiu-37 � 6 5 �rx tx ssiu-38 � 6 1 5 2 �rx tx ssiu-39 � 6 3 5 4 �rx tx ssiu-40 � 6 s 5 t �rx tx ssiu-41 � 6 u 5 v �rx tx ssiu-42 � 6 y 5 z �rx tx ssiu-43 � 6 { 5 | �rx tx ssiu-44 � 6 } 5 ~ �rx tx ssiu-45 � 6 5 � �rx tx ssiu-46 � 6 � 5 � �rx tx ssiu-47 � 6 � 5 � �rx tx ssiu-48 � 6 � 5 � �rx tx ssiu-49 � 6 � 5 � �rx tx ssiu-50 � 6 � 5 � �rx tx ssiu-51 � 6 � 5 � �rx tx port I p endpoint � 7 �i2s 8 8 9 I 8 dma-controller@ec700000 ( renesas,dmac-r8a774b1 renesas,rcar-dmac � �p � � ^ @ A B C D E F G H I J K L M N O L 'error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15 � � Ffck � h � 7 B I 6 dma-controller@ec720000 ( renesas,dmac-r8a774b1 renesas,rcar-dmac � �r � � _ P Q R S T U V W X Y Z [ \ ] ~ L 'error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15 � � Ffck � h � 7 B I 5 usb@ee000000 - renesas,xhci-r8a774b1 renesas,rcar-gen3-xhci � � � f � H � h H ookay � : default I < usb@ee020000 7 renesas,r8a774b1-usb3-peri renesas,rcar-gen3-usb3-peri � � � h � H � h H ookay ; usb & < usb@ee080000
generic-ohci � � � l � � � usb � h � � ookay I > usb@ee0a0000
generic-ohci � �
� p � � = usb � h � ookay I ? usb@ee080100
generic-ehci � � � l � � � usb & > � h � � ookay usb@ee0a0100
generic-ehci � �
� p � � = usb & ? � h � ookay usb-phy@ee080200 5 renesas,usb2-phy-r8a774b1 renesas,rcar-gen3-usb2-phy � � � l � � � � h � � O ookay � @ default 0 A I usb-phy@ee0a0200 5 renesas,usb2-phy-r8a774b1 renesas,rcar-gen3-usb2-phy � �
� � � h � O ookay � B default I = mmc@ee100000 - renesas,sdhi-r8a774b1 renesas,rcar-gen3-sdhi � � � � � : < �� � h : ookay � C J D default state_uhs T E ` F m v � � mmc@ee120000 - renesas,sdhi-r8a774b1 renesas,rcar-gen3-sdhi � � � � � 9 < �� � h 9 odisabled mmc@ee140000 - renesas,sdhi-r8a774b1 renesas,rcar-gen3-sdhi � � � � � 8 < �� � h 8 ookay � G default T H v � � � wlcore@2
ti,wl1837 � P I � mmc@ee160000 - renesas,sdhi-r8a774b1 renesas,rcar-gen3-sdhi � � � � � 7 < �� � h 7 ookay � J J J default state_uhs T E ` K v � � � � � spi@ee200000 1 renesas,r8a774b1-rpc-if renesas,rcar-gen3-rpc-if 0 � � � � �regs dirmap wbuf � & � � Frpc � h � odisabled sata@ee300000 - renesas,sata-r8a774b1 renesas,rcar-gen3-sata � �0 � i � / � h / odisabled interrupt-controller@f1010000 arm,gic-400 � � @ � � � � � � � � Fclk � h � I pcie@fe000000 - renesas,pcie-r8a774b1 renesas,pcie-rcar-gen3 � � � �pci p a � � � 0 0 B 8 8 B @ @ � $ � t u v � * = t � ? L Fpcie pcie_bus � h ? odisabled pcie@ee800000 - renesas,pcie-r8a774b1 renesas,pcie-rcar-gen3 � � � �pci p a � � � � � B � � B @ @ � $ � � � � � * = � � > L Fpcie pcie_bus � h > odisabled pcie-ep@fe000000 3 renesas,r8a774b1-pcie-ep renesas,rcar-gen3-pcie-ep P � � � � 0 8 ) �apb-base memory0 memory1 memory2 memory3 $ � t u v � ? Fpcie h ? � odisabled pcie-ep@ee800000 3 renesas,r8a774b1-pcie-ep renesas,rcar-gen3-pcie-ep P � � � � � � ) �apb-base memory0 memory1 memory2 memory3 $ � � � � � > Fpcie h > � odisabled fdp1@fe940000
renesas,fdp1 � �� $ � � w � h w K M fcp@fe950000
renesas,fcpf � �� � g � h g I M vsp@fe960000
renesas,vsp2 � �� � �
� r � h r K N vsp@fe9a0000
renesas,vsp2 � �� � � � � w � h w K O vsp@fea20000
renesas,vsp2 � �� P � � � o � h o K P I f vsp@fea28000
renesas,vsp2 � ��� P � � � n � h n K Q I g fcp@fe96f000
renesas,fcpv � ��� � _ � h _ I N fcp@fea27000
renesas,fcpv � ��p � [ � h [ I P fcp@fea2f000
renesas,fcpv � ��� � Z � h Z I Q fcp@fe9af000
renesas,fcpv � ��� � c � h c I O csi2@fea80000 renesas,r8a774b1-csi2 � �� � � � � � h � odisabled ports port@0 � port@1 � endpoint@0 � � R I ! endpoint@1 � � S I # endpoint@2 � � T I % endpoint@3 � � U I ' endpoint@4 � � V I ) endpoint@5 � � W I + endpoint@6 � � X I - endpoint@7 � � Y I / csi2@feaa0000 renesas,r8a774b1-csi2 � �� � � � � � h � odisabled ports port@0 � port@1 � endpoint@0 � � Z I " endpoint@1 � � [ I $ endpoint@2 � � \ I & endpoint@3 � � ] I ( endpoint@4 � � ^ I * endpoint@5 � � _ I , endpoint@6 � � ` I . endpoint@7 � � a I 0 hdmi@fead0000 - renesas,r8a774b1-hdmi renesas,rcar-gen3-hdmi � �� � � � � &
Fiahb isfr � h � ookay ports port@0 � endpoint � b I h port@1 � endpoint � c I m port@2 � endpoint � 8 I 7 display@feb00000 renesas,du-r8a774b1 � �� $ � 8 � � � � d e d * Fdu.0 du.1 du.3 dclkin.0 dclkin.1 dclkin.3 h � �
du.0 du.3 ookay W f g f ports port@0 � endpoint port@1 � endpoint � h I b port@2 � endpoint � i I j lvds@feb90000 renesas,r8a774b1-lvds � �� � � � h � odisabled ports port@0 � endpoint � j I i port@1 � endpoint chipid@fff00044 renesas,prr � �� D thermal-zones sensor1-thermal d � z � � k � � trips sensor1-crit � � � � �critical sensor2-thermal d � z � � k � � trips sensor2-crit � � � � �critical sensor3-thermal d � z � � k � � cooling-maps map0 � l � � trips trip-point1 � �� � � �passive I l sensor3-crit � � � � �critical timer arm,armv8-timer @ )
usb3s0 fixed-clock , 9�� I usb_extal fixed-clock , 9�� I aliases �/soc/serial@e6e88000 �/soc/serial@e6540000 �/soc/mmc@ee160000 �/soc/mmc@ee100000 �/soc/mmc@ee140000 chosen ignore_loglevel
serial0:115200n8 hdmi0-out hdmi-connector �a port endpoint � m I c leds
gpio-leds led1 � n led2 � n
led3 � o led4 � n regulator0 regulator-fixed fixed-1.8V % w@ = w@ U g I K regulator1 regulator-fixed fixed-3.3V % 2Z� = 2Z� U g I E sound audio-graph-card {rcar-sound � p regulator-vbus0-usb2 regulator-fixed USB20_VBUS0 % LK@ = LK@ � n � I A regulator-vccq-sdhi0 regulator-gpio SDHI0 VccQ % w@ = 2Z� � n � � 2Z� w@ I F x302-clock fixed-clock , 9��@ I e x304-clock fixed-clock , 9}x@ I audio-clkout fixed-clock , 9 �� I regulator-wlan_en regulator-fixed wlan-en-regulator % w@ = w@ � p � q � I H x1801-clock fixed-clock , 9w I memory@48000000 �memory � H x memory@480000000 �memory � � � compatible #address-cells #size-cells model #clock-cells clock-frequency phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend reg device_type power-domains next-level-cache enable-method #cooling-cells dynamic-power-coefficient clocks operating-points-v2 cache-unified cache-level interrupts-extended interrupt-affinity interrupt-parent ranges resets status timeout-sec interrupts #gpio-cells gpio-controller gpio-ranges #interrupt-cells interrupt-controller gpio-hog gpios output-low line-name pinctrl-0 pinctrl-names groups function power-source pins bias-pull-up clock-names #power-domain-cells #reset-cells #thermal-sensor-cells dmas dma-names i2c-scl-internal-delay-ns assigned-clocks assigned-clock-rates uart-has-rtscts enable-gpios renesas,buswait phys phy-names dr_mode reset-names interrupt-names #dma-cells dma-channels #phy-cells iommus renesas,ipmmu-main #iommu-cells phy-mode rx-internal-delay-ps tx-internal-delay-ps #pwm-cells renesas,id remote-endpoint reg-names #sound-dai-cells dai-format bitclock-master frame-master playback companion vbus-supply max-frequency pinctrl-1 vmmc-supply vqmmc-supply cd-gpios bus-width sd-uhs-sdr50 sd-uhs-sdr104 non-removable cap-power-off-card keep-power-in-suspend mmc-hs200-1_8v no-sd no-sdio fixed-emmc-driver-type mmc-hs400-1_8v bus-range dma-ranges interrupt-map-mask interrupt-map renesas,fcp renesas,vsps polling-delay-passive polling-delay thermal-sensors sustainable-power temperature hysteresis trip cooling-device contribution serial0 serial1 mmc0 mmc1 mmc2 bootargs stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on label dais gpio enable-active-high gpios-states startup-delay-us