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�� fU 8 a\ ( � a$ renesas,v3msk renesas,r8a77970 &Renesas V3M Starter Kit board aliases ,/soc/i2c@e6500000 1/soc/i2c@e6508000 6/soc/i2c@e6510000 ;/soc/i2c@e66d0000 @/soc/i2c@e66d8000 E/soc/serial@e6e60000 can fixed-clock M Z j cpus cpu@0 rcpu arm,cortex-a53 ~ � � � �psci j cpu@1 rcpu arm,cortex-a53 ~ � � � �psci j cache-controller cache � � � j extal fixed-clock M Z �P* j extalr fixed-clock M Z � j pmu_a53 arm,cortex-a53-pmu � T U � psci arm,psci-1.0 arm,psci-0.2 �smc scif fixed-clock M Z j soc simple-bus � watchdog@e6020000 + renesas,r8a77970-wdt renesas,rcar-gen3-wdt ~ � � � � � disabled gpio@e6050000 - renesas,gpio-r8a77970 renesas,rcar-gen3-gpio ~ � P ( 4 D P a � � � � gpio@e6051000 - renesas,gpio-r8a77970 renesas,rcar-gen3-gpio ~ � P ( 4 D P a � � � � j
gpio@e6052000 - renesas,gpio-r8a77970 renesas,rcar-gen3-gpio ~ � P ( 4 D @ P a � � � � gpio@e6053000 - renesas,gpio-r8a77970 renesas,rcar-gen3-gpio ~ �0 P ( 4 D ` P a � � � � gpio@e6054000 - renesas,gpio-r8a77970 renesas,rcar-gen3-gpio ~ �@ P ( 4 D � P a � � � � gpio@e6055000 - renesas,gpio-r8a77970 renesas,rcar-gen3-gpio ~ �P P ( 4 D � P a � � � � pinctrl@e6060000 renesas,pfc-r8a77970 ~ � j avb0 $ vavb0_mdio avb0_rgmii avb0_txcrefclk }avb0 j i2c0 vi2c0 }i2c0 j mmc_3_3v vmmc_data8 mmc_ctrl }mmc � � j qspi0 vqspi0_ctrl qspi0_data4 }qspi0 j scif0 vscif0_data }scif0 j timer@e60f0000 - renesas,r8a77970-cmt0 renesas,rcar-gen3-cmt0 ~ � � � � / �fck � / disabled timer@e6130000 - renesas,r8a77970-cmt1 renesas,rcar-gen3-cmt1 ~ � ` x y z { | } ~ � . �fck � . disabled timer@e6140000 - renesas,r8a77970-cmt1 renesas,rcar-gen3-cmt1 ~ � ` � - �fck � - disabled timer@e6148000 - renesas,r8a77970-cmt1 renesas,rcar-gen3-cmt1 ~ �� ` � , �fck � , disabled clock-controller@e6150000 renesas,r8a77970-cpg-mssr ~ � �
�extal extalr M � � j reset-controller@e6160000 renesas,r8a77970-rst ~ � system-controller@e6180000 renesas,r8a77970-sysc ~ � @ � j thermal@e6190000 renesas,thermal-r8a77970 ~ � � $ C D E �
�
� j + interrupt-controller@e61c0000 & renesas,intc-ex-r8a77970 renesas,irqc P a ~ � H � � � � � timer@e61e0000 ! renesas,tmu-r8a77970 renesas,tmu ~ � 0 $ � � � � } �fck � } disabled timer@e6fc0000 ! renesas,tmu-r8a77970 renesas,tmu ~ � 0 $ � � � � | �fck � | disabled timer@e6fd0000 ! renesas,tmu-r8a77970 renesas,tmu ~ � 0 $ / 0 1 � { �fck � { disabled timer@e6fe0000 ! renesas,tmu-r8a77970 renesas,tmu ~ � 0 $ � � � � z �fck � z disabled timer@ffc00000 ! renesas,tmu-r8a77970 renesas,tmu ~ �� 0 $ t u v � y �fck � y disabled i2c@e6500000 + renesas,i2c-r8a77970 renesas,rcar-gen3-i2c ~ �P @ � � � � �
�
� � � �tx rx tx rx � okay � default Z � hdmi@39
adi,adv7511w ~ 9 �
( 4 @ L Y h xrgb �1x ports port@0 ~ endpoint � j . port@1 ~ endpoint � j , i2c@e6508000 + renesas,i2c-r8a77970 renesas,rcar-gen3-i2c ~ �P� @ � � � � �
�
� � � �tx rx tx rx � disabled i2c@e6510000 + renesas,i2c-r8a77970 renesas,rcar-gen3-i2c ~ �Q @ � � � � �
�
� � � �tx rx tx rx � disabled i2c@e66d0000 + renesas,i2c-r8a77970 renesas,rcar-gen3-i2c ~ �m @ " � � � � �
�
� � � �tx rx tx rx � disabled i2c@e66d8000 + renesas,i2c-r8a77970 renesas,rcar-gen3-i2c ~ �m� @ � � � � �
�
� � � �tx rx tx rx � disabled serial@e6540000 = renesas,hscif-r8a77970 renesas,rcar-gen3-hscif renesas,hscif ~ �T ` � � �fck brg_int scif_clk �
1
0 1 0 �tx rx tx rx � disabled serial@e6550000 = renesas,hscif-r8a77970 renesas,rcar-gen3-hscif renesas,hscif ~ �U ` � � �fck brg_int scif_clk �
3
2 3 2 �tx rx tx rx � disabled serial@e6560000 = renesas,hscif-r8a77970 renesas,rcar-gen3-hscif renesas,hscif ~ �V ` � � �fck brg_int scif_clk �
5
4 5 4 �tx rx tx rx � disabled serial@e66a0000 = renesas,hscif-r8a77970 renesas,rcar-gen3-hscif renesas,hscif ~ �j ` � � �fck brg_int scif_clk �
7
6 7 6 �tx rx tx rx � disabled can@e66c0000 / renesas,r8a77970-canfd renesas,rcar-gen3-canfd ~ �l � � � �fck canfd can_clk � �bZ � � disabled channel0 disabled channel1 disabled ethernet@e6800000 5 renesas,etheravb-r8a77970 renesas,etheravb-rcar-gen3 ~ � , ' ( ) * + , - . / 0 1 2 3 4 5 6 7 8 9 : ; < = > ? s �ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15 ch16 ch17 ch18 ch19 ch20 ch21 ch22 ch23 ch24 � , �fck � , �rgmii � � okay � default 2 ethernet-phy@0 = � ~ �
j pwm@e6e30000 & renesas,pwm-r8a77970 renesas,pwm-rcar ~ �� I � � disabled pwm@e6e31000 & renesas,pwm-r8a77970 renesas,pwm-rcar ~ �� I � � disabled pwm@e6e32000 & renesas,pwm-r8a77970 renesas,pwm-rcar ~ �� I � � disabled pwm@e6e33000 & renesas,pwm-r8a77970 renesas,pwm-rcar ~ ��0 I � � disabled pwm@e6e34000 & renesas,pwm-r8a77970 renesas,pwm-rcar ~ ��@ I � � disabled serial@e6e60000 : renesas,scif-r8a77970 renesas,rcar-gen3-scif renesas,scif ~ �� @ � � � �fck brg_int scif_clk �
Q
P Q P �tx rx tx rx � � okay � default serial@e6e68000 : renesas,scif-r8a77970 renesas,rcar-gen3-scif renesas,scif ~ �� @ � � � �fck brg_int scif_clk �
S
R S R �tx rx tx rx � � disabled serial@e6c50000 : renesas,scif-r8a77970 renesas,rcar-gen3-scif renesas,scif ~ �� @ � � �fck brg_int scif_clk �
W
V W V �tx rx tx rx � � disabled serial@e6c40000 : renesas,scif-r8a77970 renesas,rcar-gen3-scif renesas,scif ~ �� @ � � �fck brg_int scif_clk �
Y
X Y X �tx rx tx rx � � disabled pwm@e6e80000 ! renesas,tpu-r8a77970 renesas,tpu ~ �� H � � 0 � 0 I disabled spi@e6e90000 / renesas,msiof-r8a77970 renesas,rcar-gen3-msiof ~ �� d � � � � � �
A
@ A @ �tx rx tx rx disabled spi@e6ea0000 / renesas,msiof-r8a77970 renesas,rcar-gen3-msiof ~ �� d � � � � � �
C
B C B �tx rx tx rx disabled spi@e6c00000 / renesas,msiof-r8a77970 renesas,rcar-gen3-msiof ~ � d � � � � � �
E
D E D �tx rx tx rx disabled spi@e6c10000 / renesas,msiof-r8a77970 renesas,rcar-gen3-msiof ~ � d � � � � � �
G
F G F �tx rx tx rx disabled video@e6ef0000 renesas,vin-r8a77970 ~ �� � � + � + T disabled ports port@1 ~ endpoint@2 ~ � j " video@e6ef1000 renesas,vin-r8a77970 ~ �� � � * � * T disabled ports port@1 ~ endpoint@2 ~ � j # video@e6ef2000 renesas,vin-r8a77970 ~ �� � � ) � ) T disabled ports port@1 ~ endpoint@2 ~ � j $ video@e6ef3000 renesas,vin-r8a77970 ~ ��0 � � ( � ( T disabled ports port@1 ~ endpoint@2 ~ � j % dma-controller@e7300000 ( renesas,dmac-r8a77970 renesas,rcar-dmac ~ �0 l � � � � � 4 5 6 7 & �error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 � � �fck � � _ j @ j
dma-controller@e7310000 ( renesas,dmac-r8a77970 renesas,rcar-dmac ~ �1 l 3 8 9 : ; < = > ? & �error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 � � �fck � � _ j @ j iommu@e7740000 renesas,ipmmu-r8a77970 ~ �t w � � j iommu@ff8b0000 renesas,ipmmu-r8a77970 ~ �� w � � iommu@e67b0000 renesas,ipmmu-r8a77970 ~ �{ � � � � j iommu@ffc80000 renesas,ipmmu-r8a77970 ~ �� w � � j iommu@febd0000 renesas,ipmmu-r8a77970 ~ �� w � � mmc@ee140000 - renesas,sdhi-r8a77970 renesas,rcar-gen3-sdhi ~ � � � : � : � �� okay � default � � � � spi@ee200000 1 renesas,r8a77970-rpc-if renesas,rcar-gen3-rpc-if 0 ~ � � � �regs dirmap wbuf & � � �rpc � � okay � default flash@0 ! spansion,s25fs512s jedec,spi-nor ~ ��� � partitions fixed-partitions bootparam@0 ~ cr7@40000 ~ cert_header_sa3@c0000 ~ bl2@140000 ~ cert_header_sa6@180000 ~ bl31@1c0000 ~ F uboot@640000 ~ d uboot-env@700000 ~ p dtb@740000 ~ t kernel@7c0000 ~ | @ user@1bc0000 ~� D interrupt-controller@f1010000 arm,gic-400 P a @ ~ � � � � � � �clk � � j vsp@fea20000
renesas,vsp2 ~ �� P � � o � o
! j ' fcp@fea27000
renesas,fcpv ~ ��p � [ � [ j ! csi2@feaa0000 renesas,r8a77970-csi2 ~ �� � � � � � disabled ports port@0 ~ port@1 ~ endpoint@0 ~ � " j endpoint@1 ~ � # j endpoint@2 ~ � $ j endpoint@3 ~ � % j display@feb00000 renesas,du-r8a77970 ~ �� � � & �du.0 dclkin.0 � � du.0 % ' okay ports port@0 ~ endpoint port@1 ~ endpoint � ( j ) lvds-encoder@feb90000 renesas,r8a77970-lvds ~ �� � � � � okay ports port@0 ~ endpoint � ) j ( port@1 ~ endpoint � * j - chipid@fff00044 renesas,prr ~ �� D thermal-zones cpu-thermal 2 � H � V + cooling-maps trips cpu-crit f � r � ycritical timer arm,armv8-timer @ �
chosen }serial0:115200n8 hdmi-out hdmi-connector ya port endpoint � , j lvds-decoder thine,thc63lvd1024 � ports port@0 ~ endpoint � - j * port@2 ~ endpoint � . j memory@48000000 rmemory ~ H x osc5-clock fixed-clock M Z�� j & regulator-0 regulator-fixed
�VCC_D1.8V � w@ � w@ � � j regulator-1 regulator-fixed
�VCC_D3.3V � 2Z� � 2Z� � � j regulator-2 regulator-fixed �VCC_VDDQ_VIN0 � 2Z� � 2Z� � � j compatible #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 i2c4 serial0 #clock-cells clock-frequency phandle device_type reg clocks power-domains next-level-cache enable-method cache-unified cache-level interrupts-extended interrupt-affinity interrupt-parent ranges resets status interrupts #gpio-cells gpio-controller gpio-ranges #interrupt-cells interrupt-controller groups function power-source clock-names #power-domain-cells #reset-cells #thermal-sensor-cells dmas dma-names i2c-scl-internal-delay-ns pinctrl-0 pinctrl-names #sound-dai-cells avdd-supply dvdd-supply pvdd-supply bgvdd-supply dvdd-3v-supply adi,input-depth adi,input-colorspace adi,input-clock remote-endpoint assigned-clocks assigned-clock-rates interrupt-names phy-mode rx-internal-delay-ps tx-internal-delay-ps iommus renesas,no-ether-link phy-handle rxc-skew-ps #pwm-cells renesas,id #dma-cells dma-channels renesas,ipmmu-main #iommu-cells max-frequency vmmc-supply vqmmc-supply bus-width non-removable reg-names spi-max-frequency spi-rx-bus-width read-only renesas,fcp reset-names renesas,vsps polling-delay-passive polling-delay thermal-sensors temperature hysteresis stdout-path vcc-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on