PHP WebShell

• .. (вверх)
• [DIR] ..
• [FILE] r8a774a1-beacon-rzg2m-kit.dtb
• [FILE] r8a774a1-hihope-rzg2m-ex-idk-1110wr.dtb
• [FILE] r8a774a1-hihope-rzg2m-ex-mipi-2.1.dtb
• [FILE] r8a774a1-hihope-rzg2m-ex.dtb
• [FILE] r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
• [FILE] r8a774a1-hihope-rzg2m-rev2-ex.dtb
• [FILE] r8a774a1-hihope-rzg2m-rev2.dtb
• [FILE] r8a774a1-hihope-rzg2m.dtb
• [FILE] r8a774b1-beacon-rzg2n-kit.dtb
• [FILE] r8a774b1-hihope-rzg2n-ex-idk-1110wr.dtb
• [FILE] r8a774b1-hihope-rzg2n-ex-mipi-2.1.dtb
• [FILE] r8a774b1-hihope-rzg2n-ex.dtb
• [FILE] r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb
• [FILE] r8a774b1-hihope-rzg2n-rev2-ex.dtb
• [FILE] r8a774b1-hihope-rzg2n-rev2.dtb
• [FILE] r8a774b1-hihope-rzg2n.dtb
• [FILE] r8a774c0-cat874.dtb
• [FILE] r8a774c0-ek874-idk-2121wr.dtb
• [FILE] r8a774c0-ek874-mipi-2.1.dtb
• [FILE] r8a774c0-ek874.dtb
• [FILE] r8a774e1-beacon-rzg2h-kit.dtb
• [FILE] r8a774e1-hihope-rzg2h-ex-idk-1110wr.dtb
• [FILE] r8a774e1-hihope-rzg2h-ex-mipi-2.1.dtb
• [FILE] r8a774e1-hihope-rzg2h-ex.dtb
• [FILE] r8a774e1-hihope-rzg2h.dtb
• [FILE] r8a77950-salvator-x.dtb
• [FILE] r8a77950-ulcb-kf.dtb
• [FILE] r8a77950-ulcb.dtb
• [FILE] r8a77951-salvator-x.dtb
• [FILE] r8a77951-salvator-xs.dtb
• [FILE] r8a77951-ulcb-kf.dtb
• [FILE] r8a77951-ulcb.dtb
• [FILE] r8a77960-salvator-x.dtb
• [FILE] r8a77960-salvator-xs.dtb
• [FILE] r8a77960-ulcb-kf.dtb
• [FILE] r8a77960-ulcb.dtb
• [FILE] r8a77961-salvator-xs.dtb
• [FILE] r8a77961-ulcb-kf.dtb
• [FILE] r8a77961-ulcb.dtb
• [FILE] r8a77965-salvator-x.dtb
• [FILE] r8a77965-salvator-xs.dtb
• [FILE] r8a77965-ulcb-kf.dtb
• [FILE] r8a77965-ulcb.dtb
• [FILE] r8a77970-eagle.dtb
• [FILE] r8a77970-v3msk.dtb
• [FILE] r8a77980-condor.dtb
• [FILE] r8a77980-v3hsk.dtb
• [FILE] r8a77990-ebisu.dtb
• [FILE] r8a77995-draak.dtb
• [FILE] r8a779a0-falcon.dtb
• [FILE] r8a779m1-salvator-xs.dtb
• [FILE] r8a779m1-ulcb-kf.dtb
• [FILE] r8a779m1-ulcb.dtb
• [FILE] r8a779m3-salvator-xs.dtb
• [FILE] r8a779m3-ulcb-kf.dtb
• [FILE] r8a779m3-ulcb.dtb
• [FILE] r9a07g044l2-smarc.dtb

Просмотр файла: r8a77980-condor.dtb

�
����8} (z|�
 renesas,condorrenesas,r8a77980'&Renesas Condor board based on r8a77980
aliases,/soc/i2c@e65000001/soc/i2c@e65080006/soc/i2c@e6510000;/soc/i2c@e66d0000@/soc/i2c@e66d8000E/soc/i2c@e66e0000J/soc/serial@e6e60000R/soc/ethernet@e7400000
canfixed-clock\iy
cpus

cpu@0�cpuarm,cortex-a53��
���psciy
cpu@1�cpuarm,cortex-a53�
�
���psciy
cpu@2�cpuarm,cortex-a53��
���psciy
cpu@3�cpuarm,cortex-a53��
���psciy
cache-controllercache���y
extalfixed-clock\i�P*y

extalrfixed-clock\i�y
pcie_busfixed-clock\i��y)
pmu_a53arm,cortex-a53-pmu@�TUVW�
psciarm,psci-1.0arm,psci-0.2�smc
sciffixed-clock\i�y
socsimple-bus


watchdog@e6020000+renesas,r8a77980-wdtrenesas,rcar-gen3-wdt���


�� 


�
%okay
,<
gpio@e6050000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio��P
8
C
O
_	
k
|�

�� 

�
gpio@e6051000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio��P
8
C
O
_	 
k
|�

�� 

�y
gpio@e6052000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio�� P
8
C
O
_	@
k
|�

�� 

�
gpio@e6053000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio��0P
8
C
O
_	`
k
|�

�� 

�
gpio@e6054000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio��@P
8
C
O
_	�
k
|�

�� 

�y$
gpio@e6055000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio��PP
8	
C
O
_	�
k
|�

�� 

�
pinctrl@e6060000renesas,pfc-r8a77980��y	
canfd0
�canfd0_data_a
�canfd0y
getherB
�gether_mdio_agether_rgmiigether_txcrefclkgether_txcrefclk_mega
�gethery"
i2c0
�i2c0
�i2c0y
mmc
�mmc_data8mmc_ctrlmmc_ds
�mmc
�y&
qspi0
�qspi0_ctrlqspi0_data4
�qspi0y(
scif0
�scif0_data
�scif0y
scif_clk
�scif_clk_b	
�scif_clky
timer@e60f0000-renesas,r8a77980-cmt0renesas,rcar-gen3-cmt0��
8���


/
�fck� 


/	
%disabled
timer@e6130000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1��`
8xyz{|}~�


.
�fck� 


.	
%disabled
timer@e6140000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1��`
8







	�


-
�fck� 


-	
%disabled
timer@e6148000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1���`
8







�


,
�fck� 


,	
%disabled
clock-controller@e6150000renesas,r8a77980-cpg-mssr���


�extalextalr\
�
�
y

reset-controller@e6160000renesas,r8a77980-rst��
system-controller@e6180000renesas,r8a77980-sysc��@
�
y
thermal@e6198000renesas,r8a77980-thermal ���
�
$
8CDE�


� 



�
y9
interrupt-controller@e61c0000&renesas,intc-ex-r8a77980renesas,irqc
k
|��H
8
��


�� 


�
timer@e61e0000!renesas,tmu-r8a77980renesas,tmu��0$
8����

}
�fck� 

}	
%disabled
timer@e6fc0000!renesas,tmu-r8a77980renesas,tmu��0$
8����

|
�fck� 

|	
%disabled
timer@e6fd0000!renesas,tmu-r8a77980renesas,tmu��0$
8
/
0
1�

{
�fck� 

{	
%disabled
timer@e6fe0000!renesas,tmu-r8a77980renesas,tmu��0$
8����

z
�fck� 

z	
%disabled
timer@ffc00000!renesas,tmu-r8a77980renesas,tmu���0$
8tuv�

y
�fck� 

y	
%disabled
i2c@e6500000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c��P@
8
�

�� 

� 
���
�
�
�txrxtxrx

%okay$defaulti�
gpio@20
onnn,pca9654� 
O
C
gpio@21
onnn,pca9654�!
O
C
hdmi@39
adi,adv7511w�9

82>JVcr�rgb�1x
ports

port@0�
endpoint�y<
port@1�

endpoint�y:
i2c@e6508000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c��P�@
8
 �

�� 

� 
���
�
�
�txrxtxrx
	
%disabled
i2c@e6510000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c��Q@
8
�

�� 

� 
���
�
�
�txrxtxrx
	
%disabled
i2c@e66d0000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c��m@
8
"�

�� 

�
	
%disabled
i2c@e66d8000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c��m�@
8�

�� 

�
	
%disabled
i2c@e66e0000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c��n@
8�

�� 

� 
���
�
�
�txrxtxrx
	
%disabled
serial@e6540000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif��T`
8��



�fckbrg_intscif_clk 
�10
1
0
�txrxtxrx� 

	
%disabled
serial@e6550000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif��U`
8��



�fckbrg_intscif_clk 
�32
3
2
�txrxtxrx� 

	
%disabled
serial@e6560000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif��V`
8��



�fckbrg_intscif_clk 
�54
5
4
�txrxtxrx� 

	
%disabled
serial@e66a0000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif��j`
8��



�fckbrg_intscif_clk 
�76
7
6
�txrxtxrx� 

	
%disabled
pcie-phy@e65d0000renesas,r8a77980-pcie-phy��]���


?� 


?
%okayy*
can@e66c0000/renesas,r8a77980-canfdrenesas,rcar-gen3-canfd��l�
8�

�
 
�fckcanfdcan_clk�
 �bZ� 

�
%okay$default
channel0
%okay
channel1	
%disabled
ethernet@e68000005renesas,etheravb-r8a77980renesas,etheravb-rcar-gen3��
,
8'()*+,-./0123456789:;<=>?s�ch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24�

,
�fck� 

,�rgmii�*!
	
%disabled
pwm@e6e30000&renesas,pwm-r8a77980renesas,pwm-rcar���1�

� 

	
%disabled
pwm@e6e31000&renesas,pwm-r8a77980renesas,pwm-rcar���1�

� 

	
%disabled
pwm@e6e32000&renesas,pwm-r8a77980renesas,pwm-rcar��� 1�

� 

	
%disabled
pwm@e6e33000&renesas,pwm-r8a77980renesas,pwm-rcar���01�

� 

	
%disabled
pwm@e6e34000&renesas,pwm-r8a77980renesas,pwm-rcar���@1�

� 

	
%disabled
serial@e6e60000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif���@
8��

�

�fckbrg_intscif_clk 
�QP
Q
P
�txrxtxrx� 

�
%okay$default
serial@e6e68000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif���@
8��

�

�fckbrg_intscif_clk 
�SR
S
R
�txrxtxrx� 

�	
%disabled
serial@e6c50000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif���@
8�

�

�fckbrg_intscif_clk 
�WV
W
V
�txrxtxrx� 

�	
%disabled
serial@e6c40000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif���@
8�

�

�fckbrg_intscif_clk 
�YX
Y
X
�txrxtxrx� 

�	
%disabled
pwm@e6e80000!renesas,tpu-r8a77980renesas,tpu���
H
8��


0� 


01	
%disabled
spi@e6e90000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof���d
8��

�� 

�
	
%disabled
spi@e6ea0000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof���d
8��

�� 

�
	
%disabled
spi@e6c00000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof��d
8��

�� 

�
	
%disabled
spi@e6c10000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof��d
8��

�� 

�
	
%disabled
video@e6ef0000renesas,vin-r8a77980���
8��

+� 

+<	
%disabled
ports

port@1
�

endpoint@2��y,
video@e6ef1000renesas,vin-r8a77980���
8��

*� 	
%disabled<


*
ports

port@1
�

endpoint@2��y-
video@e6ef2000renesas,vin-r8a77980��� 
8��

)� 

)<	
%disabled
ports

port@1
�

endpoint@2��y.
video@e6ef3000renesas,vin-r8a77980���0
8��

(� 

(<	
%disabled
ports

port@1
�

endpoint@2��y/
video@e6ef4000renesas,vin-r8a77980���@
8��

'� 

'<	
%disabled
ports

port@1
�

endpoint@3��y0
video@e6ef5000renesas,vin-r8a77980���P
8��

&� 

&<	
%disabled
ports

port@1
�

endpoint@3��y1
video@e6ef6000renesas,vin-r8a77980���`
8��

%� 

%<	
%disabled
ports

port@1
�

endpoint@3�� y2
video@e6ef7000renesas,vin-r8a77980���p
8��

$� 

$<	
%disabled
ports

port@1
�

endpoint@3��!y3
video@e6ef8000renesas,vin-r8a77980���
8
�

t� 

t<	
%disabled
video@e6ef9000renesas,vin-r8a77980���
8

�

s� 

s<		
%disabled
video@e6efa000renesas,vin-r8a77980���
8
!�

q� 

q<
	
%disabled
video@e6efb000renesas,vin-r8a77980���
8
(�

j� 

j<	
%disabled
video@e6efc000renesas,vin-r8a77980���
8
*�

d� 

d<	
%disabled
video@e6efd000renesas,vin-r8a77980����
8
+�

`� 

`<
	
%disabled
video@e6efe000renesas,vin-r8a77980����
8
-�

]� 

]<	
%disabled
video@e6eff000renesas,vin-r8a77980����
8
.�

\� 

\<	
%disabled
dma-controller@e7300000(renesas,dmac-r8a77980renesas,rcar-dmac��0
�
8�����
4
5
6
7
a
b
c
d
e
f
g
hL�errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15�

�
�fck� 

�G
R�*
	

y
dma-controller@e7310000(renesas,dmac-r8a77980renesas,rcar-dmac��1
�
8
3
8
9
:
;
<
=
>
?
i
j
k
l
m
n
o
pL�errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15�

�
�fck� 

�G
R�*y

ethernet@e7400000renesas,gether-r8a77980��@
8�

-� 

-

%okay"$default	�rgmii-id_#j
ethernet-phy@0���
$
8y#
iommu@e7740000renesas,ipmmu-r8a77980��t�%� �
y
iommu@ff8b0000renesas,ipmmu-r8a77980����%��

iommu@e67b0000renesas,ipmmu-r8a77980��{
8��� �
y%
iommu@ffc80000renesas,ipmmu-r8a77980����%
� �

iommu@fe990000renesas,ipmmu-r8a77980����%� �

iommu@febd0000renesas,ipmmu-r8a77980����%� �

iommu@e7b00000renesas,ipmmu-r8a77980���%� �

iommu@e7960000renesas,ipmmu-r8a77980���%� �

mmc@ee140000-renesas,sdhi-r8a77980renesas,rcar-gen3-sdhi�� 
8��


:� 


:���* 
%okay&�&$defaultstate_uhs��'����
spi@ee2000001renesas,r8a77980-rpc-ifrenesas,rcar-gen3-rpc-if0�� � �
regsdirmapwbuf
8&�

�
�rpc� 

�

%okay($default
flash@0!spansion,s25fs512sjedec,spi-nor���.
partitionsfixed-partitions


bootparam@0�?
cr7@40000�?
cert_header_sa3@c0000�?
bl2@140000�?
cert_header_sa6@180000�?
bl31@1c0000�F?
uboot@640000�d?
uboot-env@700000�p?
dtb@740000�t
kernel@7c0000�|
@
user@1bc0000�
�D
interrupt-controller@f1010000arm,gic-400
k
|@��
���
8
	�


�
�clk� 


�y
pcie@fe000000-renesas,pcie-r8a77980renesas,pcie-rcar-gen3��I��pcip

�� �  00B88SB@@�$
8���
k
^ q��


?)
�pciepcie_bus� 


?*�pcie
%okay
vsp@fea20000
renesas,vsp2���P
8��

o� 

o�+y5
fcp@fea27000
renesas,fcpv���p�

[� 

[y+
csi2@feaa0000renesas,r8a77980-csi2���

8��

�� 

�	
%disabled
ports

port@0�
port@1
�

endpoint@0��,y
endpoint@1�
�-y
endpoint@2��.y
endpoint@3��/y
csi2@feab0000renesas,r8a77980-csi2���

8��

�� 

�	
%disabled
ports

port@0�
port@1
�

endpoint@0��0y
endpoint@1�
�1y
endpoint@2��2y 
endpoint@3��3y!
display@feb00000renesas,du-r8a77980���
8
�

�4
�du.0dclkin.0� 

��du.0�5
%okay
ports

port@0�
endpoint
port@1�

endpoint�6y7
lvds-encoder@feb90000renesas,r8a77980-lvds����

�� 

�
%okay
ports

port@0�
endpoint�7y6
port@1�

endpoint�8y;
chipid@fff00044renesas,prr���D
thermal-zones
sensor1-thermal�����9
trips
sensor1-passive�
s���passive
sensor1-critical�
���	�critical
sensor2-thermal�����9

trips
sensor2-passive�
s���passive
sensor2-critical�
���	�critical
timerarm,armv8-timer@�






chosen�serial0:115200n8
regulator-2regulator-fixed
D1.8Vw@1w@I[y
regulator-0regulator-fixed
D3.3V2Z�12Z�I[y
hdmi-outhdmi-connector�a
port
endpoint�:y
lvds-decoderthine,thc63lvd1024o
ports

port@0�
endpoint�;y8
port@2�
endpoint�<y
memory@48000000�memory�Hx
regulator-1regulator-fixed
VDDQ_VIN01w@1w@I[y'
x1-clockfixed-clock\i�� y4	compatible#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5serial0ethernet0#clock-cellsclock-frequencyphandledevice_typeregclockspower-domainsnext-level-cacheenable-methodcache-unifiedcache-levelinterrupts-extendedinterrupt-affinityinterrupt-parentrangesresetsstatustimeout-secinterrupts#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllergroupsfunctionpower-sourceclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsdmasdma-namesi2c-scl-internal-delay-nspinctrl-0pinctrl-namesavdd-supplydvdd-supplypvdd-supplybgvdd-supplydvdd-3v-supplyadi,input-depthadi,input-colorspaceadi,input-clockremote-endpoint#phy-cellsassigned-clocksassigned-clock-ratesinterrupt-namesphy-moderx-internal-delay-pstx-internal-delay-psiommus#pwm-cellsrenesas,id#dma-cellsdma-channelsphy-handlerenesas,no-ether-linkrxc-skew-psrenesas,ipmmu-main#iommu-cellsmax-frequencypinctrl-1vmmc-supplyvqmmc-supplymmc-hs200-1_8vbus-widthno-sdno-sdionon-removablereg-namesspi-max-frequencyspi-rx-bus-widthread-onlybus-rangedma-rangesinterrupt-map-maskinterrupt-mapphysphy-namesrenesas,fcpreset-namesrenesas,vspspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onvcc-supply

Выполнить команду