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�� Z� 8 T� ( � T� $ mediatek,mt2712-evb mediatek,mt2712 + ! 7MediaTek MT2712 evaluation board opp_table0 operating-points-v2 = H opp00 P #��� W B@ opp01 P )� W B@ opp02 P /D8@ W B@ opp_table1 operating-points-v2 = H opp00 P #��� W B@ opp01 P )� W B@ opp02 P /D8@ W B@ opp03 P 5w"@ W B@ opp04 P ;� @ W B@ cpus + cpu-map cluster0 core0 e core1 e cluster1 core0 e cpu@0 icpu arm,cortex-a35 u y % �cpu intermediate � � �
H cpu@1 icpu arm,cortex-a35 u �psci y % �cpu intermediate � � �
H cpu@200 icpu arm,cortex-a72 u �psci y ' �cpu intermediate � � �
H idle-states �psci cpu-sleep-0 arm,idle-state � � d � P � H cluster-sleep-0 arm,idle-state � � ^ � P � H
psci
arm,psci-0.2 �smc dummy26m fixed-clock 1��� A H dummyclk fixed-clock 1��� A H oscillator-26m fixed-clock A 1��� Nclk26m H * oscillator-32k fixed-clock A 1 � Nclk32k oscillator-50m fixed-clock A 1�� Nclkfpc oscillator-aud0 fixed-clock A 1 c.� Nclkaud_ext_i_0 oscillator-aud1 fixed-clock A 1 � Nclkaud_ext_i_1 oscillator-aud2 fixed-clock A 1
�@ Nclkaud_ext_i_2 oscillator-i2s0 fixed-clock A 1�À Nclki2si0_mck_i oscillator-i2s1 fixed-clock A 1�À Nclki2si1_mck_i oscillator-i2s2 fixed-clock A 1�À Nclki2si2_mck_i oscillator-mclk fixed-clock A 1�À Nclktdmin_mclk_i timer arm,armv8-timer
0 a
syscon@10000000 mediatek,mt2712-topckgen syscon u A H clock-controller@10001000 mediatek,mt2712-infracfg syscon u A l H syscon@10003000 mediatek,mt2712-pericfg syscon u 0 A H syscfg_pctl_a@10005000 % mediatek,mt2712-pctl-a-syscfg syscon u P H pinctrl@1000b000 mediatek,mt2712-pinctrl u � y � � � � � a � H " eth-default-pins H # tx_pins � G H I J K L � rx_pins � N O P Q R T � mdio_pins � U V � � eth-sleep-pins H $ tx_pins � G H I J K L rx_pins � N O P Q R T mdio_pins � U V usb0-iddig-pins H ) pins_iddig � usb1-iddig-pins H 1 pins_iddig � power-controller@10006000 mediatek,mt2712-scpsys syscon - u ` 0 y e i h � � g �mm mfg venc jpgdec audio vdec A H serial@1000f000 * mediatek,mt2712-uart mediatek,mt6577-uart u � a y �baud bus J
Otx rx Ydisabled rtc@10011000 mediatek,mt2712-rtc u a � spi@10013000 mediatek,mt2712-spi-slave u 0 a y �spi ` � p Ydisabled iommu@10205000 mediatek,mt2712-m4u u P a � y �bclk � � syscon@10209000 " mediatek,mt2712-apmixedsys syscon u � A iommu@1020a000 mediatek,mt2712-m4u u � a � y �bclk � � syscon@10220000 mediatek,mt2712-mcucfg syscon u " A H interrupt-controller@10220a80 . mediatek,mt2712-sysirq mediatek,mt6577-sysirq � �
u "
� @ H interrupt-controller@10510000 arm,gic-400 �
� @ u Q R T V a H
dma-controller@11000400 2 mediatek,mt2712-uart-dma mediatek,mt6577-uart-dma � u � � � � � � � � � � � � � � � � � � � a g h i j k l m n o p q r � y �apdma � H adc@11001000 mediatek,mt2712-auxadc u y �main � Yokay serial@11002000 * mediatek,mt2712-uart mediatek,mt6577-uart u a [ y �baud bus J Otx rx Yokay serial@11003000 * mediatek,mt2712-uart mediatek,mt6577-uart u 0 a \ y �baud bus J Otx rx Ydisabled serial@11004000 * mediatek,mt2712-uart mediatek,mt6577-uart u @ a ] y �baud bus J Otx rx Ydisabled serial@11005000 * mediatek,mt2712-uart mediatek,mt6577-uart u P a ^ y �baud bus J Otx rx Ydisabled pwm@11006000 mediatek,mt2712-pwm u ` � a M P y f
1 �top main pwm1 pwm2 pwm3 pwm4 pwm5 pwm6 pwm7 pwm8 Ydisabled i2c@11007000 mediatek,mt2712-i2c u p � � � a T � y �main dma + Ydisabled i2c@11008000 mediatek,mt2712-i2c u � � � a U � y �main dma + Ydisabled i2c@11009000 mediatek,mt2712-i2c u � � � � a V � y �main dma + Ydisabled spi@1100a000 mediatek,mt2712-spi + u � a v y l �parent-clk sel-clk spi-clk Ydisabled nfi@1100e000 mediatek,mt2712-nfc u � a ` y � �nfi_clk pad_clk � + Ydisabled ecc@1100f000 mediatek,mt2712-ecc u � a _ y � �nfiecc_clk Ydisabled H i2c@11010000 mediatek,mt2712-i2c u � � a W � y �main dma + Ydisabled i2c@11011000 mediatek,mt2712-i2c u � � � a X � y �main dma + Ydisabled i2c@11013000 mediatek,mt2712-i2c u 0 � � a Z � y �main dma + Ydisabled spi@11015000 mediatek,mt2712-spi + u P a y l �parent-clk sel-clk spi-clk Ydisabled spi@11016000 mediatek,mt2712-spi + u ` a y l �parent-clk sel-clk spi-clk Ydisabled spi@10012000 mediatek,mt2712-spi + u a y l �parent-clk sel-clk spi-clk Ydisabled spi@11018000 mediatek,mt2712-spi + u � a y l �parent-clk sel-clk spi-clk Ydisabled serial@11019000 * mediatek,mt2712-uart mediatek,mt6577-uart u � a ~ y �baud bus J Otx rx Ydisabled stmmac-axi-config � �
H rx-queues-config - H queue0 > Q i tx-queues-config w � H queue0 � > i queue1 � > i queue2 � > i ethernet@1101c000 mediatek,mt2712-gmac u � a � �macirq � U{�}� �axi apb mac_main ptp_ref y " % � � ` � � p = � � � � � ' 2 Yokay :rgmii-rxid C ! N � c " W sdefault sleep � # � $ mdio snps,dwmac-mdio + ethernet-phy@5 ethernet-phy-id0243.0d90 u H ! mmc@11230000 mediatek,mt2712-mmc u # a O y * , & �source hclk bus_clk source_cg Ydisabled mmc@11240000 mediatek,mt2712-mmc u $ a P y
c ' �source hclk source_cg Ydisabled mmc@11250000 mediatek,mt2712-mmc u % a Q y c ( �source hclk source_cg Ydisabled usb@11271000 # mediatek,mt2712-mtu3 mediatek,mtu3 u ' 0 ( �mac ippc a z � % & � y n �sys_ck � + � Yokay � ' � ( �otg � � sdefault � ) usb@11270000 ' mediatek,mt2712-xhci mediatek,mtk-xhci u ' �mac a { � y n * �sys_ck ref_ck Yokay � + t-phy@11290000 . mediatek,mt2712-tphy mediatek,generic-tphy-v2 + � ) � Yokay usb-phy@0 u y * �ref Yokay H % usb-phy@8000 u � y * �ref Yokay H & usb-phy@8700 u � y * �ref Yokay H 2 usb@112c1000 # mediatek,mt2712-mtu3 mediatek,mtu3 u , 0 - �mac ippc a � � , - . � y n �sys_ck � + � Yokay � / � 0 �otg � sdefault � 1 usb@112c0000 ' mediatek,mt2712-xhci mediatek,mtk-xhci u , �mac a � � y n * �sys_ck ref_ck Yokay t-phy@112e0000 . mediatek,mt2712-tphy mediatek,generic-tphy-v2 + � . � Yokay usb-phy@0 u y * �ref Yokay H , usb-phy@8000 u � y * �ref Yokay H - usb-phy@8700 u � y * �ref Yokay H . pcie@11700000 mediatek,mt2712-pcie ipci u p /� �port0 port1 + a s u y � � # $ �sys_ck0 sys_ck1 ahb_ck0 ahb_ck1 � 2 . pcie-phy0 pcie-phy1 ' � �� pcie@0,0 ipci Ydisabled u + � � 1 ` D 3 3 3 3 interrupt-controller � � H 3 pcie@1,0 ipci Ydisabled u + � � 1 ` D 4 4 4 4 interrupt-controller � � H 4 syscon@13000000 mediatek,mt2712-mfgcfg syscon u A syscon@14000000 mediatek,mt2712-mmsys syscon u A H 6 larb@14021000 mediatek,mt2712-smi-larb u R 5 _ � y 6 6 �apb smi H smi@14022000 mediatek,mt2712-smi-common u � y 6 6 �apb smi H 5 larb@14027000 mediatek,mt2712-smi-larb u p R 7 _ � y 6 , 6 , �apb smi H larb@14030000 mediatek,mt2712-smi-larb u R 7 _ � y 6 . 6 . �apb smi H smi@14031000 mediatek,mt2712-smi-common u � y 6 - 6 - �apb smi H 7 larb@14032000 mediatek,mt2712-smi-larb u R 7 _ � y 6 8 6 8 �apb smi H syscon@15000000 mediatek,mt2712-imgsys syscon u A H 8 larb@15001000 mediatek,mt2712-smi-larb u R 5 _ � y 8 8 �apb smi H syscon@15010000 mediatek,mt2712-bdpsys syscon u A syscon@16000000 mediatek,mt2712-vdecsys syscon u A H 9 larb@16010000 mediatek,mt2712-smi-larb u R 5 _ � y 9 9 �apb smi H syscon@18000000 mediatek,mt2712-vencsys syscon u A H : larb@18001000 mediatek,mt2712-smi-larb u R 5 _ � y : : �apb smi H larb@18002000 mediatek,mt2712-smi-larb u R 5 _ � y : : �apb smi H syscon@19000000 ! mediatek,mt2712-jpgdecsys syscon u A aliases p/serial@11002000 memory@40000000 imemory u @ � chosen xserial0:921600n8 regulator-vproc-buck0 regulator-fixed �vproc_buck0 � B@ � B@ H regulator-vproc-buck1 regulator-fixed �vproc_buck1 � B@ � B@ H extcon_iddig linux,extcon-usb-gpio � " H ( extcon_iddig1 linux,extcon-usb-gpio � " H 0 regulator-usb-p0-vbus regulator-fixed �p0_vbus � LK@ � LK@ n "
� H ' regulator-usb-p1-vbus regulator-fixed �p1_vbus � LK@ � LK@ n " � H / regulator-usb-p2-vbus regulator-fixed �p2_vbus � LK@ � LK@ n " � H + regulator-usb-p3-vbus regulator-fixed �p3_vbus � LK@ � LK@ n " � � compatible interrupt-parent #address-cells #size-cells model opp-shared phandle opp-hz opp-microvolt cpu device_type reg clocks clock-names proc-supply operating-points-v2 cpu-idle-states enable-method entry-method local-timer-stop entry-latency-us exit-latency-us min-residency-us arm,psci-suspend-param clock-frequency #clock-cells clock-output-names interrupts #reset-cells mediatek,pctl-regmap pins-are-numbered gpio-controller #gpio-cells interrupt-controller #interrupt-cells pinmux drive-strength input-enable input-disable bias-disable bias-pull-up #power-domain-cells infracfg dmas dma-names status assigned-clocks assigned-clock-parents mediatek,larbs #iommu-cells dma-requests #dma-cells #io-channel-cells #pwm-cells clock-div ecc-engine snps,wr_osr_lmt snps,rd_osr_lmt snps,blen snps,rx-queues-to-use snps,rx-sched-sp snps,dcb-algorithm snps,map-to-dma-channel snps,priority snps,tx-queues-to-use snps,tx-sched-wrr snps,weight interrupt-names mac-address power-domains mediatek,pericfg snps,axi-config snps,mtl-rx-config snps,mtl-tx-config snps,txpbl snps,rxpbl clk_csr phy-mode phy-handle mediatek,tx-delay-ps snps,reset-gpio pinctrl-names pinctrl-0 pinctrl-1 reg-names phys mediatek,syscon-wakeup ranges vbus-supply extcon dr_mode wakeup-source mediatek,u3p-dis-msk #phy-cells enable-manual-drd phy-names bus-range interrupt-map-mask interrupt-map mediatek,smi mediatek,larb-id serial0 stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt id-gpio enable-active-high regulator-always-on