�
�� �* 8 �| ( � �D ` google,hana-rev6 google,hana-rev5 google,hana-rev4 google,hana-rev3 google,hana mediatek,mt8173 + 7Google Hana aliases =/soc/ovl@1400c000 B/soc/ovl@1400d000 G/soc/rdma@1400e000 M/soc/rdma@1400f000 S/soc/rdma@14010000 Y/soc/wdma@14011000 _/soc/wdma@14012000 e/soc/color@14013000 l/soc/color@14014000 s/soc/split@14018000 z/soc/split@14019000 �/soc/dpi@1401d000 �/soc/dsi@1401b000 �/soc/dsi@1401c000 �/soc/rdma@14001000 �/soc/rdma@14002000 �/soc/rsz@14003000 �/soc/rsz@14004000 �/soc/rsz@14005000 �/soc/wdma@14006000 �/soc/wrot@14007000 �/soc/wrot@14008000 �/soc/serial@11002000 �/soc/serial@11003000 �/soc/serial@11004000 �/soc/serial@11005000 �/soc/mmc@11230000 /soc/mmc@11240000 /soc/mmc@11260000 opp_table0 operating-points-v2 opp-507000000 84� &
x opp-702000000 )� &
�� opp-1001000000 ;� @ & �� opp-1105000000 A�@ & eh opp-1209000000 H�@ & � opp-1300000000 M|m & � opp-1508000000 Y�A & � opp-1703000000 e��� & *� opp_table1 operating-points-v2 opp-507000000 84� & �` opp-702000000 )� &
:� opp-1001000000 ;� @ & % opp-1209000000 H�@ & �@ opp-1404000000 S�W & ]� opp-1612000000 `+ & � opp-1807000000 k��� & �� opp-2106000000 }�� & *� cpus + cpu-map cluster0 core0 4 core1 4 cluster1 core0 4 core1 4 cpu@0 8cpu arm,cortex-a53 D Hpsci V f u �
�cpu intermediate � � � �
cpu@1 8cpu arm,cortex-a53 D Hpsci V f u �
�cpu intermediate � � � �
cpu@100 8cpu arm,cortex-a72 D Hpsci V f u � �cpu intermediate � � � �
cpu@101 8cpu arm,cortex-a72 D Hpsci V f u � �cpu intermediate � � � �
idle-states �psci cpu-sleep-0 arm,idle-state � � � @ 1 pmu_a53 arm,cortex-a53-pmu H S pmu_a72 arm,cortex-a72-pmu H
S psci # arm,psci-1.0 arm,psci-0.2 arm,psci Osmc f� r� z� oscillator0 fixed-clock � ���� �clk26m oscillator1 fixed-clock � � } �clk32k oscillator2 fixed-clock � � �cpum_ck thermal-zones cpu-thermal � � � � � � � trips trip-point0 � �` � ?passive trip-point1 � �� � ?passive cpu_crit0 � �8 � ?critical cooling-maps map0 �������� �������� " map1 �������� �������� " reserved-memory + / vpu_dma_mem_region@b7000000 shared-dma-pool D � P 6 @ timer arm,armv8-timer 0 H
G soc + simple-bus / clock-controller@10000000 mediatek,mt8173-topckgen D � power-controller@10001000 mediatek,mt8173-infracfg syscon D � ^ power-controller@10003000 mediatek,mt8173-pericfg syscon D 0 � ^ syscfg_pctl_a@10005000 % mediatek,mt8173-pctl-a-syscfg syscon D P pinctrl@1000b000 mediatek,mt8173-pinctrl D � k � � � � � $ H � � � % �EC_INT_1V8 SD_CD_L ALC5514_IRQ ALC5650_IRQ AP_FLASH_WP_L SFIN SFCS0 SFHOLD SFOUT SFCK WRAP_EVENT_S_EINT10 PMU_INT I2S2_WS_ALC5650 I2S2_BCK_ALC5650 PWR_BTN_1V8 DA9212_IRQ IDDIG WATCHDOG CEC HDMISCK HDMISD HTPLG MSDC3_DAT0 MSDC3_DAT1 MSDC3_DAT2 MSDC3_DAT3 MSDC3_CLK MSDC3_CMD USB_C0_OC_FLAGB USBA_OC1_L PS8640_1V2_ENABLE THERM_ALERT_N PANEL_LCD_POWER_EN ANX7688_CHIP_PD_C EC_IN_RW_1V8 ANX7688_1V_EN_C USB_DP_HPD_C TPM_DAVINT_N MARVELL8897_IRQ EN_USB_A0_PWR USBA_A0_OC_L EN_PP3300_DX_EDP SOC_I2C2_1V8_SDA_400K SOC_I2C2_1V8_SCL_400K SOC_I2C0_1V8_SDA_400K SOC_I2C0_1V8_SCL_400K EMMC_ID1 EMMC_ID0 MEM_CONFIG3 EMMC_ID2 MEM_CONFIG1 MEM_CONFIG2 BRD_ID2 MEM_CONFIG0 BRD_ID0 BRD_ID1 EMMC_DAT0 EMMC_DAT1 EMMC_DAT2 EMMC_DAT3 EMMC_DAT4 EMMC_DAT5 EMMC_DAT6 EMMC_DAT7 EMMC_CLK EMMC_CMD EMMC_RCLK PLT_RST_L LID_OPEN_1V8_L AUDIO_SPI_MISO_R AC_OK_1V8 SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3 SD_CLK SD_CMD PWRAP_SPI0_MI PWRAP_SPI0_MO PWRAP_SPI0_CK PWRAP_SPI0_CSN WIFI_PDN RTC32K_1V8 DISP_PWM0 TOUCHSCREEN_INT_L SRCLKENA0 SRCLKENA1 PS8640_MODE_CONF TOUCHSCREEN_RESET_R PLATFORM_PROCHOT_L PANEL_POWER_EN REC_MODE_L EC_FW_UPDATE_L ACCEL2_INT_L HDMI_DP_INT ACCELGYRO3_INT_L ACCELGYRO4_INT_L SPI_EC_CLK SPI_EC_MI SPI_EC_MO SPI_EC_CSN SOC_I2C3_1V8_SDA_400K SOC_I2C3_1V8_SCL_400K PS8640_SYSRSTN_1V8 APIN_MAX98090_DOUT2 TP_INT_1V8_L_R RST_USB_HUB_R BT_WAKE_L ACCEL1_INT_L TABLET_MODE_L V_UP_IN_L_R V_DOWN_IN_L_R SOC_I2C1_1V8_SDA_1M SOC_I2C1_1V8_SCL_1M PS8640_PDN_1V8 MAX98090_LRCLK MAX98090_BCLK MAX98090_MCLK APOUT_MAX98090_DIN APIN_MAX98090_DOUT SOC_I2C4_1V8_SDA_400K SOC_I2C4_1V8_SCL_400K xxx L pins1 � � � i2c0 pins1 � - . i2c1 ' pins1 � } ~ da9211_pins � i2c2 ( pins1 � + , i2c3 - pins1 � j k i2c4 pins1 � � � i2c6 0 pins1 � d e aud_i2s2 b pins1 � � � � �
� � bl_fixed_pins W pins1 � ! bt_wake_pins pins1 � w disp_pwm0_pins V pins1 � W ! gpio_keys_pins X volume_pins � { | tablet_mode_pins � y hdmi_mux_pins pins1 � $ pins2 � b , mmc0default 2 pins_cmd_dat $ � 9 : ; < = > ? @ B pins_clk � A � pins_rst � D mmc1default 6 pins_cmd_dat � I J K L N � 8 f pins_clk � M � 8 pins_insert � pins_wp � * � mmc3default : pins_dat � � 8 f pins_cmd � � 8 f pins_clk � � 8 mmc0 3 pins_cmd_dat $ � 9 : ; < = > ? @ B � 8 e pins_clk � A 8 � e pins_ds � C 8
� e pins_rst � D mmc1 7 pins_cmd_dat � I J K L N � 8 f pins_clk � M 8 � f mmc3 ; pins_dat � � 8 f pins_cmd � � 8 f pins_clk � 8 � f nor , pins1 � � 8 pins2 � 8 pins_clk � � 8 panel_fixed_pins \ pins1 � ) ps8640_pins " pins1 � \ s ps8640_fixed_pins ] pins1 � rt5650_irq ! pins1 � � sdio_fixed_3v3_pins ^ pins1 � U ! spi1 ) pins1 � pins_spi � f g h i trackpad_irq . pins1 � u � usb B pins1 � e , wifi_wake_pins pins1 � & syscon@10006000 syscon simple-mfd D ` G power-controller ! mediatek,mt8173-power-controller + G 1 power-domain@0 D � U �mm G power-domain@1 D � U X �mm venc G power-domain@2 D � U �mm G power-domain@3 D � U �mm G [ power-domain@4 D � U i
�mm venclt G power-domain@5 D G power-domain@6 D G power-domain@7 D � �mfg + G m power-domain@8 D + G power-domain@9 D G [ watchdog@10007000 ( mediatek,mt8173-wdt mediatek,mt6589-wdt D p timer@10008000 , mediatek,mt8173-timer mediatek,mt6577-timer D � H � � x pwrap@1000d000 mediatek,mt8173-pwrap D � {pwrap H � � �pwrap �
�spi wrap mt6397 mediatek,mt6397 + H � � clocks mediatek,mt6397-clk � pinctrl mediatek,mt6397-pinctrl � � � regulators mediatek,mt6397-regulator buck_vpca15 �vpca15 �
�` � �p � 0� �
buck_vpca7 �vpca7 �
�` � �p � 0� s � buck_vsramca15
�vsramca15 �
�` � �p � 0� � buck_vsramca7 �vsramca7 �
�` � �p � 0� �
buck_vcore �vcore �
�` � �p � 0� � buck_vgpu �vgpu �
�` � �p � 0� s buck_vdrm �vdrm � O� � \� � 0� � buck_vio18 �vio18 � � � 6` � 0� � 5 ldo_vtcxo �vtcxo � ldo_va28 �va28 ldo_vcama �vcama � w@ � w@ � ldo_vio28 �vio28 � ldo_vusb �vusb A ldo_vmc �vmc � w@ � 2Z� � 9 ldo_vmch �vmch � -� � 2Z� � 8 ldo_vemc3v3 �vemc_3v3 � -� � 2Z� � 4 ldo_vgp1 �vcamd � w@ � w@ � ldo_vgp2 �vcamio � 2Z� � 2Z� � $ ldo_vgp3 �vcamaf � w@ � w@ � = ldo_vgp4 �vgp4 � O� � 2Z� � ldo_vgp5 �vgp5 � O� � -� � ldo_vgp6 �vgp6 � 2Z� � 2Z� � � / ldo_vibr �vibr � � � 2Z� � rtc mediatek,mt6397-rtc syscfg_pctl_pmic@c000 ( mediatek,mt6397-pctl-pmic-syscfg syscon D � cec@10013000 mediatek,mt8173-cec D 0 � H � � 4okay vpu@10020000 mediatek,mt8173-vpu D {tcm cfg_reg H � � g �main ; F intpol-controller@10200620 . mediatek,mt8173-sysirq mediatek,mt6577-sysirq � � D iommu@10205000 mediatek,mt8173-m4u D P H � � �bclk I X E efuse@10206000 mediatek,mt8173-efuse D ` + calib@528 D ( + clock-controller@10209000 mediatek,mt8173-apmixedsys D � � hdmi-phy@10209100 mediatek,mt8173-hdmi-phy D � $ � �pll_ref �hdmitx_dig_cts e t � � 4okay M mailbox@10212000 mediatek,mt8173-gce D ! H � � �gce � C dsi-phy@10215000 mediatek,mt8173-mipi-tx D !P �
�mipi_tx0_pll � � 4okay G dsi-phy@10216000 mediatek,mt8173-mipi-tx D !` �
�mipi_tx1_pll � � 4disabled I interrupt-controller@10221000 arm,gic-400 � � @ D " " "@ "` H auxadc@11001000 mediatek,mt8173-auxadc D � �main � * serial@11002000 * mediatek,mt8173-uart mediatek,mt6577-uart D H S � $ �baud bus 4okay serial@11003000 * mediatek,mt8173-uart mediatek,mt6577-uart D 0 H T � % �baud bus 4disabled serial@11004000 * mediatek,mt8173-uart mediatek,mt6577-uart D @ H U � & �baud bus 4disabled serial@11005000 * mediatek,mt8173-uart mediatek,mt6577-uart D P H V � ' �baud bus 4disabled i2c@11007000 mediatek,mt8173-i2c D p p � H L � �
�main dma �default � + 4okay �
@ audio-codec@1a realtek,rt5650 D � � H �default � ! � � _ edp-bridge@8 parade,ps8640 D " 2 s �default � " > # K $ ports + port@0 D endpoint X % H port@1 D endpoint X & [ i2c@11008000 mediatek,mt8173-i2c D � p � � H M � �
�main dma �default � ' + 4okay � �` da9211@68 dlg,da9211 D h H regulators BUCKA �VBUCKA �
�` � �0 h �� C#� � ' � BUCKB �VBUCKB �
�` � �0 h �� -� � ' i2c@11009000 mediatek,mt8173-i2c D � p � H N � �
�main dma �default � ( + 4okay tpm@20 infineon,slb9645tt D � spi@1100a000 mediatek,mt8173-spi + D � H n � 4 \ �parent-clk sel-clk spi-clk 4okay �default � ) � ec@0 google,cros-ec-spi D � � H � � i2c-tunnel0 google,cros-ec-i2c-tunnel � + sbs-battery@b sbs,sbs-battery D keyboard-controller google,cros-ec-keyb , <
O D i ; < = > ? @ A B C D } 0 Y 1
d " # ( \ V
| } ) � + ^ a ! % $ ' &
+ , . / - 3 2 * 5 4 9
8 l j 6 g i thermal@1100b000 v mediatek,mt8173-thermal D � H F �
�therm auxadc � � * � � + �calibration-data �
� spi@1100d000 mediatek,mt8173-nor D � � � ! r �spi sf + 4okay �default � , flash@0 jedec,spi-nor D ��� i2c@11010000 mediatek,mt8173-i2c D p � � H O � �
�main dma �default � - + 4okay � � touchscreen@10 elan,ekth3500 D H X touchscreen@34 melfas,mip4_ts D 4 H X touchscreen@20
hid-over-i2c D � H X i2c@11011000 mediatek,mt8173-i2c D p � H P � �
�main dma �default � . + 4okay � � trackpad@15 elan,ekth3000 H u D � / trackpad@2c
hid-over-i2c H u D , � � / i2c@11012000 mediatek,mt8173-hdmi-ddc H Q D � �ddc-i2c c i2c@11013000 mediatek,mt8173-i2c D 0 p � � H R � � #
�main dma �default � 0 + 4disabled audio-controller@11220000 mediatek,mt8173-afe-pcm D " H � 1 P � d e y � � � � � b �infra_sys_audio_clk top_pdn_audio top_pdn_aud_intbus bck0 bck1 i2s0_m i2s1_m i2s2_m i2s3_m i2s3_b m n - a mmc@11230000 mediatek,mt8173-mmc D # H G � _ �source hclk 4okay �default state_uhs � 2 D 3 N � �� X j y � � @ � � � 4 5 ` - & mmc@11240000 mediatek,mt8173-mmc D $ H H � R �source hclk 4okay �default state_uhs � 6 D 7 N � �� , = J X 8 9 a * mmc@11250000 mediatek,mt8173-mmc D % H I � R �source hclk 4disabled mmc@11260000 mediatek,mt8173-mmc D & H J � u �source hclk 4okay �default state_uhs � : D ; N � �� , = J j � � < = � + btmrvl@2 marvell,sd8897-bt D H w �
� d mwifiex@1 marvell,sd8897 D H & � usb@11271000 # mediatek,mt8173-mtu3 mediatek,mtu3 D ' 0 ( {mac ippc H @ � > ? @ 1 � ^ �sys_ck ref_ck � + / 4okay �host
A usb@11270000 ' mediatek,mt8173-xhci mediatek,mtk-xhci D ' {mac H s 1 � ^ �sys_ck ref_ck 4okay �default � B
A t-phy@11290000 mediatek,mt8173-u3phy D ) + / 4okay usb-phy@11290800 D ) � �ref � 4okay > usb-phy@11290900 D ) � �ref � 4okay ? usb-phy@11291000 D ) � �ref � 4okay @ syscon@14000000 mediatek,mt8173-mmsys syscon D 1 U
ׄ �
# C C
* C D rdma@14001000 - mediatek,mt8173-mdp-rdma mediatek,mt8173-mdp D � D D 1
B E
I
W F rdma@14002000 mediatek,mt8173-mdp-rdma D � D D 1
B E �
I rsz@14003000 mediatek,mt8173-mdp-rsz D 0 � D 1 rsz@14004000 mediatek,mt8173-mdp-rsz D @ � D 1 rsz@14005000 mediatek,mt8173-mdp-rsz D P � D 1 wdma@14006000 mediatek,mt8173-mdp-wdma D ` � D 1
B E
I wrot@14007000 mediatek,mt8173-mdp-wrot D p � D 1
B E
I wrot@14008000 mediatek,mt8173-mdp-wrot D � � D
1
B E �
I ovl@1400c000 mediatek,mt8173-disp-ovl D � H � 1 � D
B E
I
* C � ovl@1400d000 mediatek,mt8173-disp-ovl D � H � 1 � D
B E �
I
* C � rdma@1400e000 mediatek,mt8173-disp-rdma D � H � 1 � D
B E
I
* C � rdma@1400f000 mediatek,mt8173-disp-rdma D � H � 1 � D
B E �
I
* C � rdma@14010000 mediatek,mt8173-disp-rdma D H � 1 � D
B E �
I
* C wdma@14011000 mediatek,mt8173-disp-wdma D H � 1 � D
B E
I
* C wdma@14012000 mediatek,mt8173-disp-wdma D H � 1 � D
B E �
I
* C color@14013000 mediatek,mt8173-disp-color D 0 H � 1 � D
* C 0 color@14014000 mediatek,mt8173-disp-color D @ H � 1 � D
* C @ aal@14015000 mediatek,mt8173-disp-aal D P H � 1 � D
* C P gamma@14016000 mediatek,mt8173-disp-gamma D ` H � 1 � D
* C ` merge@14017000 mediatek,mt8173-disp-merge D p 1 � D split@14018000 mediatek,mt8173-disp-split D � 1 � D split@14019000 mediatek,mt8173-disp-split D � 1 � D ufoe@1401a000 mediatek,mt8173-disp-ufoe D � H � 1 � D dsi@1401b000 mediatek,mt8173-dsi D � H � 1 � D $ D % G �engine digital hs � G
ddphy 4okay ports port endpoint X H % dsi@1401c000 mediatek,mt8173-dsi D � H � 1 � D & D ' I �engine digital hs � I
ddphy 4disabled dpi@1401d000 mediatek,mt8173-dpi D � H � 1 � D ( D ) �pixel engine pll 4okay port endpoint X J N pwm@1401e000 mediatek,mt8173-disp-pwm D �
n � D ! D �main mm 4okay T pwm@1401f000 mediatek,mt8173-disp-pwm D �
n � D # D " �main mm 4disabled mutex@14020000 mediatek,mt8173-disp-mutex D H � 1 � D
y 5 6 larb@14021000 mediatek,mt8173-smi-larb D
� K 1 � D D �apb smi smi@14022000 mediatek,mt8173-smi-common D 1 � D D �apb smi K od@14023000 mediatek,mt8173-disp-od D 0 � D hdmi@14025000 mediatek,mt8173-hdmi D P H � � D , D - D . D / �pixel pll bclk spdif �default � L � M
dhdmi
� D s - M 4okay ` ports + port@0 D endpoint X N J port@1 D endpoint X O d larb@14027000 mediatek,mt8173-smi-larb D p
� K 1 � D 2 D 2 �apb smi clock-controller@15000000 mediatek,mt8173-imgsys syscon D � P larb@15001000 mediatek,mt8173-smi-larb D
� K 1 � P P �apb smi clock-controller@16000000 mediatek,mt8173-vdecsys syscon D � Q vcodec@16000000 mediatek,mt8173-vcodec-dec � D 0 @ P h p x � H �
I @
B E E ! E % E & E ' E " E # E $
W F 1 @ �
> l W M i N Z �vcodecpll univpll_d2 clk_cci400_sel vdec_sel vdecpll vencpll venc_lt_sel vdec_bus_clk_src ( i l W
- N > M
XU��/� larb@16010000 mediatek,mt8173-smi-larb D
� K 1 � Q Q �apb smi clock-controller@18000000 mediatek,mt8173-vencsys syscon D � R larb@18001000 mediatek,mt8173-smi-larb D
� K 1 � R R �apb smi vcodec@18002000 mediatek,mt8173-vcodec-enc D H �
I X
B E ` E a E b E c E d E i E j E k E l E m E n
W F � X �venc_sel X - M jpegdec@18004000 mediatek,mt8173-jpgdec D @ H � � R R �jpgdec-smi jpgdec 1
I
B E g E h clock-controller@19000000 ! mediatek,mt8173-vencltsys syscon D � S larb@19001000 mediatek,mt8173-smi-larb D
� K 1 � S S �apb smi vcodec@19002000 mediatek,mt8173-vcodec-enc-vp8 D H � H
B E � E � E � E � E � E � E � E � E �
I
W F � i �venc_lt_sel i - N memory@40000000 8memory D @ � backlight pwm-backlight
� T B@
� U
� _ �default � V 4okay Z fixedregulator2 regulator-fixed �bl_fixed � w@ � w@
� �
�
� �default � W U chosen
�serial0:115200n8 gpio-keys
gpio-keys �default � X lid Lid , E % power Power , t 5 % tablet_mode Tablet_mode , y % volume_down Volume_down , { r volume_up
Volume_up , | s panel lg,lp120up1
� Y G Z port endpoint X [ & regulator1 regulator-fixed
�PANEL_3V3 � 2Z� � 2Z�
�
� ) �default � \ Y regulator2 regulator-fixed �PS8640_1V2 � O� � O� �
� Q
� �default � ] # fixedregulator0 regulator-fixed �3V3 � 2Z� � 2Z�
� U �default � ^ < sound mediatek,mt8173-rt5650 c _ ` x a �default � b � codec-capture � _ connector hdmi-connector hdmi ?a � c port endpoint X d O compatible interrupt-parent #address-cells #size-cells model ovl0 ovl1 rdma0 rdma1 rdma2 wdma0 wdma1 color0 color1 split0 split1 dpi0 dsi0 dsi1 mdp-rdma0 mdp-rdma1 mdp-rsz0 mdp-rsz1 mdp-rsz2 mdp-wdma0 mdp-wrot0 mdp-wrot1 serial0 serial1 serial2 serial3 mmc0 mmc1 mmc2 opp-shared phandle opp-hz opp-microvolt cpu device_type reg enable-method cpu-idle-states #cooling-cells dynamic-power-coefficient clocks clock-names operating-points-v2 capacity-dmips-mhz proc-supply sram-supply entry-method local-timer-stop entry-latency-us exit-latency-us min-residency-us arm,psci-suspend-param interrupts interrupt-affinity cpu_suspend cpu_off cpu_on #clock-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors sustainable-power temperature hysteresis trip cooling-device contribution ranges alignment no-map arm,no-tick-in-suspend #reset-cells mediatek,pctl-regmap pins-are-numbered gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-line-names pinmux input-enable bias-pull-down bias-disable bias-pull-up output-low output-high drive-strength #power-domain-cells mediatek,infracfg domain-supply reg-names resets reset-names regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-allowed-modes regulator-enable-ramp-delay status memory-region mediatek,larbs #iommu-cells mediatek,ibias mediatek,ibias_up #phy-cells #mbox-cells #io-channel-cells clock-div pinctrl-names pinctrl-0 avdd-supply cpvdd-supply #sound-dai-cells realtek,dmic1-data-pin realtek,jd-mode powerdown-gpios reset-gpios vdd12-supply vdd33-supply remote-endpoint regulator-min-microamp regulator-max-microamp powered-while-suspended mediatek,pad-select spi-max-frequency google,cros-ec-spi-msg-delay google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys nvmem-cells nvmem-cell-names bank0-supply bank1-supply hid-descr-addr vcc-supply wakeup-source power-domains assigned-clocks assigned-clock-parents pinctrl-1 bus-width cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v cap-mmc-hw-reset hs400-ds-delay mediatek,hs200-cmd-int-delay mediatek,hs400-cmd-int-delay mediatek,hs400-cmd-resp-sel-rising vmmc-supply vqmmc-supply non-removable cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 cd-gpios wp-gpios keep-power-in-suspend enable-sdio-wakeup cap-sdio-irq cap-power-off-card marvell,wakeup-pin marvell,wakeup-gap-ms phys mediatek,syscon-wakeup dr_mode vusb33-supply assigned-clock-rates mboxes mediatek,gce-client-reg iommus mediatek,larb mediatek,vpu phy-names #pwm-cells mediatek,gce-events mediatek,smi mediatek,syscon-hdmi pwms power-supply enable-gpios startup-delay-us enable-active-high gpio stdout-path label linux,code linux,input-type gpio-key,wakeup debounce-interval backlight regulator-boot-on mediatek,audio-codec mediatek,platform mediatek,mclk sound-dai ddc-i2c-bus