�
�� � 8 ~ ( � }� $ rockchip,rk3328-evb rockchip,rk3328 + 7Rockchip RK3328 EVB aliases =/serial@ff110000 E/serial@ff120000 M/serial@ff130000 U/i2c@ff150000 Z/i2c@ff160000 _/i2c@ff170000 d/i2c@ff180000 i/ethernet@ff540000 s/ethernet@ff550000 }/mmc@ff500000 �/mmc@ff510000 �/mmc@ff520000 cpus + cpu@0 �cpu arm,cortex-a53 � � � � � x �psci � � cpu@1 �cpu arm,cortex-a53 � � � � � x �psci � �
cpu@2 �cpu arm,cortex-a53 � � � � � x �psci � � cpu@3 �cpu arm,cortex-a53 � � � � � x �psci � � idle-states "psci cpu-sleep arm,idle-state / @ W x h � x � l2-cache0 cache opp_table0 operating-points-v2 � opp-408000000 � Q� � ~� � �@ � opp-600000000 � #�F � ~� � �@ opp-816000000 � 0�, � B@ � �@ opp-1008000000 � <� � �� � �@ opp-1200000000 � G�� � �( � �@ opp-1296000000 � M?d � � � �@ analog-sound simple-audio-card �i2s � �Analog disabled simple-audio-card,cpu simple-audio-card,codec arm-pmu arm,cortex-a53-pmu 0 ! d e f g ,
display-subsystem rockchip,display-subsystem ?
hdmi-sound simple-audio-card �i2s � � �HDMI disabled simple-audio-card,cpu simple-audio-card,codec psci arm,psci-1.0 arm,psci-0.2 �smc timer arm,armv8-timer 0 !
xin24m fixed-clock E Rn6 bxin24m A i2s@ff000000 ( rockchip,rk3328-i2s rockchip,rk3066-i2s � � ! � ) 7 ui2s_clk i2s_hclk � �tx rx � disabled i2s@ff010000 ( rockchip,rk3328-i2s rockchip,rk3066-i2s � � ! � * 8 ui2s_clk i2s_hclk � �tx rx � disabled i2s@ff020000 ( rockchip,rk3328-i2s rockchip,rk3066-i2s � � ! � + 9 ui2s_clk i2s_hclk � �tx rx � disabled spdif@ff030000 rockchip,rk3328-spdif � � ! � . :
umclk hclk �
�tx �default � � disabled pdm@ff040000
rockchip,pdm � � � = R updm_clk pdm_hclk � �rx �default sleep � � disabled syscon@ff100000 & rockchip,rk3328-grf syscon simple-mfd � � 7 io-domains " rockchip,rk3328-io-voltage-domain disabled gpio rockchip,rk3328-grf-gpio � � power-controller ! rockchip,rk3328-power-controller � + 9 power-domain@6 � � D � power-domain@5 � � power-domain@8 � � � F � reboot-mode syscon-reboot-mode � � �RB� RB� RB� $RB� serial@ff110000 & rockchip,rk3328-uart snps,dw-apb-uart � � ! 7 � & � ubaudclk apb_pclk � �tx rx �default � 0 = disabled serial@ff120000 & rockchip,rk3328-uart snps,dw-apb-uart � � ! 8 � ' � ubaudclk apb_pclk � �tx rx �default � ! 0 = disabled serial@ff130000 & rockchip,rk3328-uart snps,dw-apb-uart � � ! 9 � ( � ubaudclk apb_pclk � �tx rx �default � " 0 = okay i2c@ff150000 ( rockchip,rk3328-i2c rockchip,rk3399-i2c � � ! $ + � 7 � ui2c pclk �default � # disabled i2c@ff160000 ( rockchip,rk3328-i2c rockchip,rk3399-i2c � � ! % + � 8 � ui2c pclk �default � $ okay pmic@18 rockchip,rk805 � % ! E bxin32k rk805-clkout2 � � �default � & G h v ' � ' � ' � ' � ( � ( regulators DCDC_REG1
�vdd_logic �
�4 � � regulator-state-mem # ; B@ DCDC_REG2 �vdd_arm �
�4 � � regulator-state-mem # ; ~� DCDC_REG3 �vcc_ddr � regulator-state-mem # DCDC_REG4 �vcc_io � 2Z� � 2Z� � ( regulator-state-mem # ; 2Z� LDO_REG1 �vcc_18 � w@ � w@ � regulator-state-mem # ; w@ LDO_REG2 �vcc18_emmc � w@ � w@ � regulator-state-mem # ; w@ LDO_REG3 �vdd_10 � B@ � B@ � regulator-state-mem # ; B@ i2c@ff170000 ( rockchip,rk3328-i2c rockchip,rk3399-i2c � � ! & + � 9 � ui2c pclk �default � ) disabled i2c@ff180000 ( rockchip,rk3328-i2c rockchip,rk3399-i2c � � ! ' + � : � ui2c pclk �default � * disabled spi@ff190000 ( rockchip,rk3328-spi rockchip,rk3066-spi � � ! 1 + � � uspiclk apb_pclk � �tx rx �default � + , - . disabled watchdog@ff1a0000 rockchip,rk3328-wdt snps,dw-wdt � � ! ( � � pwm@ff1b0000 rockchip,rk3328-pwm � � � < � upwm pclk �default � / W disabled pwm@ff1b0010 rockchip,rk3328-pwm � � � < � upwm pclk �default � 0 W disabled pwm@ff1b0020 rockchip,rk3328-pwm � � � < � upwm pclk �default � 1 W disabled pwm@ff1b0030 rockchip,rk3328-pwm � � 0 ! 2 � < � upwm pclk �default � 2 W disabled dma-controller@ff1f0000 arm,pl330 arm,primecell � � @ ! b � � uapb_pclk y thermal-zones soc-thermal � � � � � � 3 trips trip-point0 � p � � �passive trip-point1 � L � � �passive 4 soc-crit � s � � �critical cooling-maps map0 � 4 0 � ��������
�������� �������� �������� � tsadc@ff250000 rockchip,rk3328-tsadc � �% ! : $ �P � $ � utsadc apb_pclk �init default sleep � 5 � 6 ' 5 1 B
8tsadc-apb D 7 Q �� h okay 3 efuse@ff260000 rockchip,rk3328-efuse � �& P + � > upclk_efuse ~ id@7 � cpu-leakage@17 � logic-leakage@19 � cpu-version@1a � � B adc@ff280000 . rockchip,rk3328-saradc rockchip,rk3399-saradc � �( ! P � � % � usaradc apb_pclk 1 V 8saradc-apb disabled gpu@ff300000 " rockchip,rk3328-mali arm,mali-450 � �0 T ! Z W ] X Y [ \ " �gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1 � � � ubus core 1 f iommu@ff330200 rockchip,iommu � �3 ! `
�h265e_mmu � � � uaclk iface � disabled iommu@ff340800 rockchip,iommu � �4 @ ! b �vepu_mmu � � F uaclk iface � disabled video-codec@ff350000 rockchip,rk3328-vpu � �5 ! �vdpu � � F
uaclk hclk � 8 � 9 iommu@ff350800 rockchip,iommu � �5 @ ! �vpu_mmu � � F uaclk iface � � 9 8 iommu@ff360480 rockchip,iommu � �6� @ �6� @ ! J �rkvdec_mmu � � B uaclk iface � disabled vop@ff370000 rockchip,rk3328-vop � �7 >� ! � � x ; uaclk_vop dclk_vop hclk_vop 1 � � �
8axi ahb dclk � : disabled port +
endpoint@0 � � ; @ iommu@ff373f00 rockchip,iommu � �7? ! �vop_mmu � � ; uaclk iface � disabled : hdmi@ff3c0000 rockchip,rk3328-dw-hdmi � �< 0 ! # � � F uiahb isfr cec � < �hdmi �default � = > ? D 7 � disabled ports + port@0 � endpoint � @ ; port@1 � codec@ff410000 rockchip,rk3328-codec � �A � � *
upclk mclk D 7 � disabled phy@ff430000 rockchip,rk3328-hdmi-phy � �C ! S � � A y usysclk refoclk refpclk bhdmi_phy E � B cpu-version disabled < clock-controller@ff440000 ( rockchip,rk3328-cru rockchip,cru syscon � �D D 7 E " � x = & ' ( � � � � � � � � A B D C " \ 5 � H � � 4 � $ / z A A A | �� n6 n6 n6 �� ��� �� ׄ �� ���� �� �� ��������n6 #�F L G�� �рxh�xh��рxh�xh� � syscon@ff450000 . rockchip,rk3328-usb2phy-grf syscon simple-mfd � �E + usb2phy@100 rockchip,rk3328-usb2phy � � A uphyclk busb480m_phy E { / C okay C otg-port $ ! ; < = �otg-bvalid otg-id linestate okay T host-port ! >
�linestate okay U mmc@ff500000 0 rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc � �P @ ! � = ! J N ubiu ciu ciu-drive ciu-sample F Q�р okay _ i { � �default � D E F G � H mmc@ff510000 0 rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc � �Q @ !
� > " K O ubiu ciu ciu-drive ciu-sample F Q�р okay _ { � � � I � �default � J K L mmc@ff520000 0 rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc � �R @ ! � ? # L P ubiu ciu ciu-drive ciu-sample F Q�р okay _ i � �default � M N O ethernet@ff540000 rockchip,rk3328-gmac � �T ! �macirq 8 � d W X Z Y � � M ustmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac 1 c
8stmmaceth D 7 � disabled ethernet@ff550000 rockchip,rk3328-gmac � �U D 7 ! �macirq 8 � T S S U � � V I ustmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy 1 b
8stmmaceth �rmii � P � �output okay Q �� e / T mdio snps,dwmac-mdio + ethernet-phy@0 4 ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22 � � V 1 d �default � R S * P usb@ff580000 2 rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2 � �X ! � M uotg <otg D V e � � @ � T �usb2-phy okay usb@ff5c0000
generic-ehci � �\ ! � N C � U �usb okay usb@ff5d0000
generic-ohci � �] ! � N C � U �usb okay usb@ff600000 rockchip,rk3328-dwc3 snps,dwc3 � �` ! C � ` a � uref_clk suspend_clk bus_clk <otg
tutmi_wide } � � � � disabled interrupt-controller@ff811000 arm,gic-400 + < @ � �� �� ��@ ��` ! pinctrl rockchip,rk3328-pinctrl D 7 + Q gpio0@ff210000 rockchip,gpio-bank � �! ! 3 � � � � < + c gpio1@ff220000 rockchip,gpio-bank � �" ! 4 � � � � < + b gpio2@ff230000 rockchip,gpio-bank � �# ! 5 � � � � < + % gpio3@ff240000 rockchip,gpio-bank � �$ ! 6 � � � � < + pcfg-pull-up X X pcfg-pull-down e ` pcfg-pull-none t V pcfg-pull-none-2ma t � _ pcfg-pull-up-2ma X � pcfg-pull-up-4ma X � Y pcfg-pull-none-4ma t � \ pcfg-pull-down-4ma e � pcfg-pull-none-8ma t � Z pcfg-pull-up-8ma X � [ pcfg-pull-none-12ma t � ] pcfg-pull-up-12ma X � ^ pcfg-output-high � pcfg-output-low � pcfg-input-high X � W pcfg-input � i2c0 i2c0-xfer � V V # i2c1 i2c1-xfer � V V $ i2c2 i2c2-xfer �
V V ) i2c3 i2c3-xfer � V V * i2c3-pins � V V hdmi_i2c hdmii2c-xfer � V V > pdm-0 pdmm0-clk � V pdmm0-fsync � V pdmm0-sdi0 � V pdmm0-sdi1 � V pdmm0-sdi2 � V pdmm0-sdi3 � V pdmm0-clk-sleep � W pdmm0-sdi0-sleep � W pdmm0-sdi1-sleep � W pdmm0-sdi2-sleep � W pdmm0-sdi3-sleep � W pdmm0-fsync-sleep � W tsadc otp-pin �
V 5 otp-out �
V 6 uart0 uart0-xfer � V X uart0-cts � V uart0-rts �
V uart0-rts-pin �
V uart1 uart1-xfer � V X uart1-cts � V uart1-rts � V ! uart1-rts-pin � V uart2-0 uart2m0-xfer � V X uart2-1 uart2m1-xfer � V X " spi0-0 spi0m0-clk � X spi0m0-cs0 � X spi0m0-tx � X spi0m0-rx �
X spi0m0-cs1 � X spi0-1 spi0m1-clk � X spi0m1-cs0 � X spi0m1-tx � X spi0m1-rx � X spi0m1-cs1 � X spi0-2 spi0m2-clk � X + spi0m2-cs0 � X . spi0m2-tx � X , spi0m2-rx � X - i2s1 i2s1-mclk � V i2s1-sclk � V i2s1-lrckrx � V i2s1-lrcktx � V i2s1-sdi � V i2s1-sdo � V i2s1-sdio1 � V i2s1-sdio2 � V i2s1-sdio3 � V i2s1-sleep � � W W W W W W W W W i2s2-0 i2s2m0-mclk � V i2s2m0-sclk � V i2s2m0-lrckrx � V i2s2m0-lrcktx � V i2s2m0-sdi � V i2s2m0-sdo � V i2s2m0-sleep ` � W W W W W W i2s2-1 i2s2m1-mclk � V i2s2m1-sclk � V i2sm1-lrckrx � V i2s2m1-lrcktx � V i2s2m1-sdi � V i2s2m1-sdo � V i2s2m1-sleep P � W W W W W spdif-0 spdifm0-tx � V spdif-1 spdifm1-tx � V spdif-2 spdifm2-tx � V sdmmc0-0 sdmmc0m0-pwren � Y sdmmc0m0-pin � Y sdmmc0-1 sdmmc0m1-pwren � Y sdmmc0m1-pin � Y d sdmmc0 sdmmc0-clk � Z D sdmmc0-cmd � [ E sdmmc0-dectn � Y F sdmmc0-wrprt � Y sdmmc0-bus1 � [ sdmmc0-bus4 @ � [ [ [ [ G sdmmc0-pins � � Y Y Y Y Y Y Y Y sdmmc0ext sdmmc0ext-clk � \ sdmmc0ext-cmd � Y sdmmc0ext-wrprt � Y sdmmc0ext-dectn � Y sdmmc0ext-bus1 � Y sdmmc0ext-bus4 @ � Y Y Y Y sdmmc0ext-pins � � Y Y Y Y Y Y Y Y sdmmc1 sdmmc1-clk � Z L sdmmc1-cmd �
[ K sdmmc1-pwren � [ sdmmc1-wrprt � [ sdmmc1-dectn � [ sdmmc1-bus1 � [ sdmmc1-bus4 @ � [ [ [ [ J sdmmc1-pins � � Y
Y Y Y Y Y Y Y Y emmc emmc-clk � ] M emmc-cmd � ^ N emmc-pwren � V emmc-rstnout � V emmc-bus1 � ^ emmc-bus4 @ � ^ ^ ^ ^ emmc-bus8 � � ^ ^ ^ ^ ^ ^ ^ ^ O pwm0 pwm0-pin � V / pwm1 pwm1-pin � V 0 pwm2 pwm2-pin � V 1 pwmir pwmir-pin � V 2 gmac-1 rgmiim1-pins ` � Z
\ \ Z \ \ \
\ \ Z Z \ \ Z Z Z Z \ Z Z Z Z rmiim1-pins � _ ] _ _ _ _
_ _ ] ] V V V V V V gmac2phy fephyled-speed10 � V fephyled-duplex � V fephyled-rxm1 � V R fephyled-txm1 � V fephyled-linkm1 � V S tsadc_pin tsadc-int �
V tsadc-pin �
V hdmi_pin hdmi-cec � V = hdmi-hpd � ` ? cif-0 dvp-d2d9-m0 � � V V V V V V
V V V V V V cif-1 dvp-d2d9-m1 � � V V V V V V V V V V V V pmic pmic-int-l � X & sdio-pwrseq wifi-enable-h � V a chosen �serial2:1500000n8 dc-12v regulator-fixed �dc_12v � � � � � e sdio-pwrseq mmc-pwrseq-simple �default � a � b I sdmmc-regulator regulator-fixed � c �default � d �vcc_sd � 2Z� � 2Z� � ( H vcc-sys regulator-fixed �vcc_sys � � LK@ � LK@ � e ' vcc-phy-regulator regulator-fixed �vcc_phy � Q compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable snps,txpbl phy-mode phy-handle clock_in_out phy-supply assigned-clock-rate phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path reset-gpios gpio vin-supply