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�� @4 8 <0 ( ;� ) rockchip,rk3568-evb1-v10 rockchip,rk3568 + $ 7Rockchip RK3568 EVB1 DDR4 V10 Board aliases =/pinctrl/gpio@fdd60000 C/pinctrl/gpio@fe740000 I/pinctrl/gpio@fe750000 O/pinctrl/gpio@fe760000 U/pinctrl/gpio@fe770000 [/i2c@fdd40000 `/i2c@fe5a0000 e/i2c@fe5b0000 j/i2c@fe5c0000 o/i2c@fe5d0000 t/i2c@fe5e0000 y/serial@fdd50000 �/serial@fe650000 �/serial@fe660000 �/serial@fe670000 �/serial@fe680000 �/serial@fe690000 �/serial@fe6a0000 �/serial@fe6b0000 �/serial@fe6c0000 �/serial@fe6d0000 cpus + cpu@0 �cpu arm,cortex-a55 � � �psci � cpu@100 �cpu arm,cortex-a55 � �psci � cpu@200 �cpu arm,cortex-a55 � �psci � cpu@300 �cpu arm,cortex-a55 � �psci � cpu0-opp-table operating-points-v2
opp-408000000 Q�
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�� �0 * �@ opp-600000000 #�F
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�� �0 opp-816000000 0�,
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�� �0 ; opp-1104000000 Aʹ
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�� �0 opp-1416000000 Tfr
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�� �0 opp-1608000000 _�" � � �0 opp-1800000000 kI� � � �0 opp-1992000000 v�� �0 �0 �0 firmware scmi
arm,scmi-smc G� R + protocol@14 � X pmu arm,cortex-a55-pmu 0 e � � � � p psci
arm,psci-1.0 �smc timer arm,armv8-timer 0 e
� xin24m fixed-clock �n6 �xin24m X xin32k fixed-clock � � �xin32k � �default X sram@10f000
mmio-sram � � + � � sram@0 arm,scmi-shmem � interrupt-controller@fd400000 arm,gic-v3 � �@ �F e � � � ( syscon@fdc20000 ) rockchip,rk3568-pmugrf syscon simple-mfd � �� syscon@fdc60000 & rockchip,rk3568-grf syscon simple-mfd � �� clock-controller@fdd00000 rockchip,rk3568-pmucru � �� X &
clock-controller@fdd20000 rockchip,rk3568-cru � �� X & i2c@fdd40000 ( rockchip,rk3568-i2c rockchip,rk3399-i2c � �� e . �
- 3i2c pclk � �default + ?disabled serial@fdd50000 & rockchip,rk3568-uart snps,dw-apb-uart � �� e t �
, 3baudclk apb_pclk F �
�default K X ?disabled mmc@fe000000 0 rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc � � @ e d � � � � � 3biu ciu ciu-drive ciu-sample b m�р { � �reset ?disabled mmc@fe2b0000 0 rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc � �+ @ e b � � � � � 3biu ciu ciu-drive ciu-sample b m�р { � �reset ?disabled mmc@fe2c0000 0 rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc � �, @ e c � � � � � 3biu ciu ciu-drive ciu-sample b m�р { � �reset ?disabled mmc@fe310000 rockchip,rk3568-dwcmshc � �1 e � { } � �� n6 ( � | z y { } 3core bus axi block timer ?okay � m �� � dmac@fe530000 arm,pl330 arm,primecell � �S @ e
� �
3apb_pclk � dmac@fe550000 arm,pl330 arm,primecell � �U @ e � �
3apb_pclk � i2c@fe5a0000 ( rockchip,rk3568-i2c rockchip,rk3399-i2c � �Z e / � H G 3i2c pclk � �default + ?disabled i2c@fe5b0000 ( rockchip,rk3568-i2c rockchip,rk3399-i2c � �[ e 0 � J I 3i2c pclk � �default + ?disabled i2c@fe5c0000 ( rockchip,rk3568-i2c rockchip,rk3399-i2c � �\ e 1 � L K 3i2c pclk � �default + ?disabled i2c@fe5d0000 ( rockchip,rk3568-i2c rockchip,rk3399-i2c � �] e 2 � N M 3i2c pclk � �default + ?disabled i2c@fe5e0000 ( rockchip,rk3568-i2c rockchip,rk3399-i2c � �^ e 3 � P O 3i2c pclk � �default + ?disabled serial@fe650000 & rockchip,rk3568-uart snps,dw-apb-uart � �e e u � 3baudclk apb_pclk F � �default K X ?disabled serial@fe660000 & rockchip,rk3568-uart snps,dw-apb-uart � �f e v � # 3baudclk apb_pclk F � �default K X ?okay serial@fe670000 & rockchip,rk3568-uart snps,dw-apb-uart � �g e w � ' $ 3baudclk apb_pclk F � �default K X ?disabled serial@fe680000 & rockchip,rk3568-uart snps,dw-apb-uart � �h e x � + ( 3baudclk apb_pclk F � �default K X ?disabled serial@fe690000 & rockchip,rk3568-uart snps,dw-apb-uart � �i e y � / , 3baudclk apb_pclk F
� �default K X ?disabled serial@fe6a0000 & rockchip,rk3568-uart snps,dw-apb-uart � �j e z � 3 0 3baudclk apb_pclk F
� �default K X ?disabled serial@fe6b0000 & rockchip,rk3568-uart snps,dw-apb-uart � �k e { � 7 4 3baudclk apb_pclk F � �default K X ?disabled serial@fe6c0000 & rockchip,rk3568-uart snps,dw-apb-uart � �l e | � ; 8 3baudclk apb_pclk F � �default K X ?disabled serial@fe6d0000 & rockchip,rk3568-uart snps,dw-apb-uart � �m e } � ? < 3baudclk apb_pclk F � �default K X ?disabled pinctrl rockchip,rk3568-pinctrl � � + � gpio@fdd60000 rockchip,gpio-bank � �� e ! �
. � � gpio@fe740000 rockchip,gpio-bank � �t e " � c � � gpio@fe750000 rockchip,gpio-bank � �u e # � e � � gpio@fe760000 rockchip,gpio-bank � �v e $ � g � � gpio@fe770000 rockchip,gpio-bank � �w e % � i � � pcfg-pull-up # ! pcfg-pull-none 0 pcfg-pull-none-drv-level-1 0 = # pcfg-pull-none-drv-level-2 0 = " pcfg-pull-none-drv-level-3 0 = & pcfg-pull-up-drv-level-1 # = % pcfg-pull-up-drv-level-2 # = pcfg-pull-none-smt 0 L $ acodec audiopwm bt656 bt1120 cam can0 can1 can2 cif clk32k clk32k-out0 a cpu ebc edpdp emmc eth0 eth1 flash fspi gmac0 gmac1 gpu hdmitx i2c0 i2c0-xfer a $
$ i2c1 i2c1-xfer a $ $ i2c2 i2c2m0-xfer a
$ $ i2c3 i2c3m0-xfer a $ $ i2c4 i2c4m0-xfer a $
$ i2c5 i2c5m0-xfer a $ $ i2s1 i2s2 i2s3 isp jtag lcdc mcu npu pcie20 pcie30x1 pcie30x2 pdm pmic pmu pwm0 pwm1 pwm2 pwm3 pwm4 pwm5 pwm6 pwm7 pwm8 pwm9 pwm10 pwm11 pwm12 pwm13 pwm14 pwm15 refclk sata sata0 sata1 sata2 scr sdmmc0 sdmmc1 sdmmc2 spdif spi0 spi1 spi2 spi3 tsadc uart0 uart0-xfer a ! !
uart1 uart1m0-xfer a ! ! uart2 uart2m0-xfer a ! ! uart3 uart3m0-xfer a ! ! uart4 uart4m0-xfer a ! ! uart5 uart5m0-xfer a ! ! uart6 uart6m0-xfer a ! ! uart7 uart7m0-xfer a ! ! uart8 uart8m0-xfer a ! ! uart9 uart9m0-xfer a ! ! vop spi0-hs spi1-hs spi2-hs spi3-hs gmac-txd-level3 gmac-txc-level2 chosen oserial2:1500000n8 dc-12v regulator-fixed {dc_12v � � � � � � ' vcc3v3-sys regulator-fixed {vcc3v3_sys � � � 2Z� � 2Z� � ' vcc5v0-sys regulator-fixed {vcc5v0_sys � � � LK@ � LK@ � ' vcc3v3-lcd0-n regulator-fixed {vcc3v3_lcd0_n � regulator-state-mem � vcc3v3-lcd1-n regulator-fixed {vcc3v3_lcd1_n � regulator-state-mem � compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 device_type reg clocks enable-method operating-points-v2 phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend arm,smc-id shmem #clock-cells interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller #reset-cells clock-names status dmas reg-io-width reg-shift fifo-depth max-frequency resets reset-names assigned-clocks assigned-clock-rates bus-width non-removable arm,pl330-periph-burst #dma-cells rockchip,grf rockchip,pmu gpio-controller #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins stdout-path regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt vin-supply regulator-off-in-suspend