�
�� bY 8 [� ( � [� . rockchip,px5-evb rockchip,px5 rockchip,rk3368 + 7Rockchip PX5 EVB aliases =/ethernet@ff290000 G/i2c@ff650000 L/i2c@ff660000 Q/i2c@ff140000 V/i2c@ff150000 [/i2c@ff160000 `/i2c@ff170000 e/serial@ff180000 m/serial@ff190000 u/serial@ff690000 }/serial@ff1b0000 �/serial@ff1c0000 �/spi@ff110000 �/spi@ff120000 �/spi@ff130000 �/mmc@ff0c0000 �/mmc@ff0f0000 cpus + cpu-map cluster0 core0 � core1 � core2 � core3 � cluster1 core0 � core1 � core2 � core3 � cpu@0 �cpu arm,cortex-a53 � �psci � � cpu@1 �cpu arm,cortex-a53 � �psci � � cpu@2 �cpu arm,cortex-a53 � �psci � � cpu@3 �cpu arm,cortex-a53 � �psci � � cpu@100 �cpu arm,cortex-a53 � �psci � � cpu@101 �cpu arm,cortex-a53 � �psci � � cpu@102 �cpu arm,cortex-a53 � �psci � � cpu@103 �cpu arm,cortex-a53 � �psci � � arm-pmu arm,armv8-pmuv3 ` � p q r s t u v w � psci
arm,psci-0.2 �smc timer arm,armv8-timer 0 �
� � �
� oscillator fixed-clock �n6
xin24m mmc@ff0c0000 0 rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc � � @ -�р ;
�
D
r
v Bbiu ciu ciu-drive ciu-sample N � Y
� `reset lokay s } � � � � � � �default �
� Z
mmc@ff0d0000 0 rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc � �
@ -�р ;
�
E
s
w Bbiu ciu ciu-drive ciu-sample N � ! Y
� `reset ldisabled mmc@ff0f0000 0 rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc � � @ -�р ;
�
G
u
y Bbiu ciu ciu-drive ciu-sample N � # Y
� `reset lokay s } ��р # � 2 8 �default �
saradc@ff100000 rockchip,saradc � � � $ F ;
I
[ Bsaradc apb_pclk Y
W `saradc-apb ldisabled spi@ff110000 ( rockchip,rk3368-spi rockchip,rk3066-spi � � ;
A
R Bspiclk apb_pclk � , �default � + ldisabled spi@ff120000 ( rockchip,rk3368-spi rockchip,rk3066-spi � � ;
B
S Bspiclk apb_pclk � - �default � + ldisabled spi@ff130000 ( rockchip,rk3368-spi rockchip,rk3066-spi � � ;
C
T Bspiclk apb_pclk � ) �default � ! + ldisabled i2c@ff140000 ( rockchip,rk3368-i2c rockchip,rk3288-i2c � � � > + Bi2c ;
N �default � " lokay touchscreen@40 silead,gsl1680 � @ # � X # d w � i2c@ff150000 ( rockchip,rk3368-i2c rockchip,rk3288-i2c � � � ? + Bi2c ;
O �default � $ ldisabled i2c@ff160000 ( rockchip,rk3368-i2c rockchip,rk3288-i2c � � � @ + Bi2c ;
P �default � % ldisabled i2c@ff170000 ( rockchip,rk3368-i2c rockchip,rk3288-i2c � � � A + Bi2c ;
Q �default � & ldisabled serial@ff180000 & rockchip,rk3368-uart snps,dw-apb-uart � � �n6 ;
M
U Bbaudclk apb_pclk � 7 � � ldisabled serial@ff190000 & rockchip,rk3368-uart snps,dw-apb-uart � � �n6 ;
N
V Bbaudclk apb_pclk � 8 � � ldisabled serial@ff1b0000 & rockchip,rk3368-uart snps,dw-apb-uart � � �n6 ;
P
X Bbaudclk apb_pclk � : � � ldisabled serial@ff1c0000 & rockchip,rk3368-uart snps,dw-apb-uart � � �n6 ;
Q
Y Bbaudclk apb_pclk � ; � � lokay dma-controller@ff250000 arm,pl330 arm,primecell � �% @ � � � � ;
� Bapb_pclk thermal-zones cpu-thermal � d � ' trips cpu_alert0 % $� 1 � �passive � ( cpu_alert1 % 8� 1 � �passive � ) cpu_crit % s 1 � �critical cooling-maps map0 < ( 0 A �������� �������� �������� �������� map1 < ) 0 A �������� �������� �������� �������� gpu-thermal � d � ' trips gpu_alert0 % 8� 1 � �passive � * gpu_crit % �8 1 � �critical cooling-maps map0 < * 0 A �������� �������� �������� �������� tsadc@ff280000 rockchip,rk3368-tsadc � �( � % ;
H
Z Btsadc apb_pclk Y
�
`tsadc-apb �init default sleep � + P , Z + d z s lokay � � � ' ethernet@ff290000 rockchip,rk3368-gmac � �) � �macirq � - 8 ;
f
g
c
�
�
] M Bstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac ldisabled usb@ff500000
generic-ehci � �P � ;
� lokay usb@ff580000 2 rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2 � �X � ;
� Botg �otg � � � � @ @ lokay dma-controller@ff600000 arm,pl330 arm,primecell � �` @ � � � � ;
� Bapb_pclk � 9 i2c@ff650000 ( rockchip,rk3368-i2c rockchip,rk3288-i2c � �e ;
L Bi2c � < �default � . + lokay pmic@1b rockchip,rk808 � / � �default � 0 1 9 2 E 2 Q 2 ] 2 i 2 u 2 � � 2 � 2 � 2 �
xin32k rk808-clkout2 regulators DCDC_REG1 � � �
�` � �` vdd_cpu DCDC_REG2 � � �
�` � �` vdd_log DCDC_REG3 � � vcc_ddr DCDC_REG4 � � � 2Z� � 2Z� vcc_io � LDO_REG1 � � � w@ � w@ vcc18_flash � LDO_REG2 � � � 2Z� � 2Z� vcca_33 LDO_REG3 � � � B@ � B@ vdd_10 LDO_REG4 � 2Z� � 2Z� avdd_33 LDO_REG5 � � � w@ � 2Z� vccio_sd � LDO_REG6 � � � B@ � B@
vdd10_lcd LDO_REG7 � � � w@ � w@ vcc_18 LDO_REG8 � � � w@ � w@
vcc18_lcd SWITCH_REG1 vcc_sd � SWITCH_REG2 � �
vcc33_lcd i2c@ff660000 ( rockchip,rk3368-i2c rockchip,rk3288-i2c � �f � = + Bi2c ;
M �default � 3 lokay accelerometer@18
bosch,bma250 � 4 � pwm@ff680000 ( rockchip,rk3368-pwm rockchip,rk3288-pwm � �h % �default � 5 ;
_ ldisabled pwm@ff680010 ( rockchip,rk3368-pwm rockchip,rk3288-pwm � �h % �default � 6 ;
_ ldisabled pwm@ff680020 ( rockchip,rk3368-pwm rockchip,rk3288-pwm � �h % ;
_ ldisabled pwm@ff680030 ( rockchip,rk3368-pwm rockchip,rk3288-pwm � �h 0 % �default � 7 ;
_ ldisabled serial@ff690000 & rockchip,rk3368-uart snps,dw-apb-uart � �i ;
O
W Bbaudclk apb_pclk � 9 �default � 8 � � ldisabled mbox@ff6b0000 rockchip,rk3368-mailbox � �k 0 � � � � � ;
E
Bpclk_mailbox 0 ldisabled syscon@ff738000 ) rockchip,rk3368-pmugrf syscon simple-mfd � �s� � < io-domains & rockchip,rk3368-pmu-io-voltage-domain ldisabled reboot-mode syscon-reboot-mode < CRB� ORB� ]RB� mRB� clock-controller@ff760000 rockchip,rk3368-cru � �v � - y �
syscon@ff770000 & rockchip,rk3368-grf syscon simple-mfd � �w � - io-domains " rockchip,rk3368-io-voltage-domain ldisabled watchdog@ff800000 rockchip,rk3368-wdt snps,dw-wdt � �� ;
p � O lokay timer@ff810000 , rockchip,rk3368-timer rockchip,rk3288-timer � �� � B ;
a
U Bpclk timer spdif@ff880000 rockchip,rk3368-spdif � �� � 6 ;
S
�
Bmclk hclk � 9 �tx �default � : � ldisabled i2s-2ch@ff890000 ( rockchip,rk3368-i2s rockchip,rk3066-i2s � �� � ( Bi2s_clk i2s_hclk ;
T
� � 9 9 �tx rx � ldisabled i2s-8ch@ff898000 ( rockchip,rk3368-i2s rockchip,rk3066-i2s � ��� � 5 Bi2s_clk i2s_hclk ;
R
� � 9 9 �tx rx �default � ; � ldisabled iommu@ff900800 rockchip,iommu � �� � �iep_mmu ;
�
� Baclk iface � ldisabled iommu@ff914000 rockchip,iommu � ��@ ��P � �isp_mmu ;
�
� Baclk iface � � ldisabled iommu@ff930300 rockchip,iommu � �� � �vop_mmu ;
�
� Baclk iface � ldisabled iommu@ff9a0440 rockchip,iommu � ��@ @ ��� @ � �hevc_mmu ;
�
� Baclk iface � ldisabled iommu@ff9a0800 rockchip,iommu � �� �
�vepu_mmu vdpu_mmu ;
�
� Baclk iface � ldisabled efuse@ffb00000 rockchip,rk3368-efuse � �� + ;
q Bpclk_efuse cpu-leakage@17 � temp-adjust@1f � interrupt-controller@ffb71000 arm,gic-400 � � @ � �� �� ��@ ��` � � � pinctrl rockchip,rk3368-pinctrl � - � < + gpio0@ff750000 rockchip,gpio-bank � �u ;
@ � Q � � � / gpio1@ff780000 rockchip,gpio-bank � �x ;
A � R � � gpio2@ff790000 rockchip,gpio-bank � �y ;
B � S � � � 4 gpio3@ff7a0000 rockchip,gpio-bank � �z ;
C � T � � � # pcfg-pull-up $ � > pcfg-pull-down 1 pcfg-pull-none @ � = pcfg-pull-none-12ma @ M � ? emmc emmc-clk \ = � emmc-cmd \ > � emmc-pwr \ > emmc-bus1 \ > emmc-bus4 @ \ > > > > emmc-bus8 � \ > > > > > > > > � gmac rgmii-pins � \ = = = ? ?
? ? ?
? = = = = = = rmii-pins � \ = = = ? ?
? = = = = i2c0 i2c0-xfer \ = = � . i2c1 i2c1-xfer \ = = � 3 i2c2 i2c2-xfer \ = = � " i2c3 i2c3-xfer \ = = � $ i2c4 i2c4-xfer \ = = � % i2c5 i2c5-xfer \ = = � & i2s i2s-8ch-bus � \ =
= = = = = = = = � ; pwm0 pwm0-pin \ = � 5 pwm1 pwm1-pin \ = � 6 pwm3 pwm3-pin \ = � 7 sdio0 sdio0-bus1 \ > sdio0-bus4 @ \ > > > > sdio0-cmd \ > sdio0-clk \ = sdio0-cd \ > sdio0-wp \ > sdio0-pwr \ > sdio0-bkpwr \ > sdio0-int \ > sdmmc sdmmc-clk \ = � sdmmc-cmd \
> � sdmmc-cd \ > � sdmmc-bus1 \ > sdmmc-bus4 @ \ > > > > �
spdif spdif-tx \ = � : spi0 spi0-clk \ > � spi0-cs0 \ > � spi0-cs1 \ > spi0-tx \ > � spi0-rx \ > � spi1 spi1-clk \ > � spi1-cs0 \ > � spi1-cs1 \ > spi1-rx \ > � spi1-tx \ > � spi2 spi2-clk \ > � spi2-cs0 \
> � ! spi2-rx \
> � spi2-tx \ > � tsadc otp-pin \ = � + otp-out \ = � , uart0 uart0-xfer \ > = uart0-cts \ = uart0-rts \ = uart1 uart1-xfer \ > = uart1-cts \ = uart1-rts \ = uart2 uart2-xfer \ > = � 8 uart3 uart3-xfer \ > = uart3-cts \ = uart3-rts \ = uart4 uart4-xfer \ > = uart4-cts \ = uart4-rts \ = keys pwr-key \ = � @ pmic pmic-sleep \ = � 1 pmic-int \ > � 0 chosen jserial4:115200n8 memory@0 � @ �memory gpio-keys
gpio-keys �default � @ power ^ / vGPIO Power | t � vcc-sys-regulator regulator-fixed vcc_sys � LK@ � LK@ � � � 2 compatible interrupt-parent #address-cells #size-cells model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 cpu device_type reg enable-method #cooling-cells phandle interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay no-sdio sd-uhs-sdr12 sd-uhs-sdr25 pinctrl-names pinctrl-0 rockchip,default-sample-phase vmmc-supply vqmmc-supply mmc-hs200-1_8v no-sd non-removable #io-channel-cells power-gpios touchscreen-size-x touchscreen-size-y silead,max-fingers reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name #pwm-cells #mbox-cells offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells dmas dma-names #sound-dai-cells #iommu-cells rockchip,disable-mmu-reset interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path label linux,code wakeup-source